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| author | Thomas Gleixner <tglx@linutronix.de> | 2021-12-14 12:42:14 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2021-12-14 13:23:32 +0100 |
| commit | 94185adbfad56815c2c8401e16d81bdb74a79201 (patch) | |
| tree | 2a0c49fe48a5a9c592f29c7525129dba20f63431 /drivers/pci | |
| parent | 83dbf898a2d45289be875deb580e93050ba67529 (diff) | |
| download | linux-94185adbfad56815c2c8401e16d81bdb74a79201.tar.bz2 | |
PCI/MSI: Clear PCI_MSIX_FLAGS_MASKALL on error
PCI_MSIX_FLAGS_MASKALL is set in the MSI-X control register at MSI-X
interrupt setup time. It's cleared on success, but the error handling path
only clears the PCI_MSIX_FLAGS_ENABLE bit.
That's incorrect as the reset state of the PCI_MSIX_FLAGS_MASKALL bit is
zero. That can be observed via lspci:
Capabilities: [b0] MSI-X: Enable- Count=67 Masked+
Clear the bit in the error path to restore the reset state.
Fixes: 438553958ba1 ("PCI/MSI: Enable and mask MSI-X early")
Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Stefan Roese <sr@denx.de>
Cc: linux-pci@vger.kernel.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Marek Vasut <marex@denx.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/87tufevoqx.ffs@tglx
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/msi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 6748cf9d7d90..d84cf30bb279 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -784,7 +784,7 @@ out_free: free_msi_irqs(dev); out_disable: - pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0); + pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE, 0); return ret; } |