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| author | Bjorn Helgaas <bhelgaas@google.com> | 2018-08-15 14:59:14 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2018-08-15 14:59:14 -0500 |
| commit | 732c47019de9033a68ba50175b469c9cd105df73 (patch) | |
| tree | ea3536e07c3e5194fbb7a0e7a4df7273ad024f67 /drivers/pci | |
| parent | 0ea77d2b209ac50cb15388cf0824c95e6763ed31 (diff) | |
| parent | 6f2c73c124b14808d210722fd1c0c8938f9db3ba (diff) | |
| download | linux-732c47019de9033a68ba50175b469c9cd105df73.tar.bz2 | |
Merge branch 'remotes/lorenzo/pci/mobiveil'
- Fix mobiveil iomem/phys_addr_t type usage (Lorenzo Pieralisi)
- Fix mobiveil missing include file (Lorenzo Pieralisi)
- Add mobiveil Kconfig/Makefile support (Lorenzo Pieralisi)
* remotes/lorenzo/pci/mobiveil:
PCI: mobiveil: Add Kconfig/Makefile entries
PCI: mobiveil: Add missing ../pci.h include
PCI: mobiveil: Fix struct mobiveil_pcie.pcie_reg_base address type
PCI: mobiveil: Integer overflow in IB_WIN_SIZE
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/controller/Kconfig | 10 | ||||
| -rw-r--r-- | drivers/pci/controller/Makefile | 1 | ||||
| -rw-r--r-- | drivers/pci/controller/pcie-mobiveil.c | 4 |
3 files changed, 14 insertions, 1 deletions
diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 0f7ce5eaeac8..028b287466fb 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -239,6 +239,16 @@ config PCIE_MEDIATEK Say Y here if you want to enable PCIe controller support on MediaTek SoCs. +config PCIE_MOBIVEIL + bool "Mobiveil AXI PCIe controller" + depends on ARCH_ZYNQMP || COMPILE_TEST + depends on OF + depends on PCI_MSI_IRQ_DOMAIN + help + Say Y here if you want to enable support for the Mobiveil AXI PCIe + Soft IP. It has up to 8 outbound and inbound windows + for address translation and it is a PCIe Gen4 IP. + config PCIE_TANGO_SMP8759 bool "Tango SMP8759 PCIe controller (DANGEROUS)" depends on ARCH_TANGO && PCI_MSI && OF diff --git a/drivers/pci/controller/Makefile b/drivers/pci/controller/Makefile index 24322b92f200..d56a507495c5 100644 --- a/drivers/pci/controller/Makefile +++ b/drivers/pci/controller/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_PCIE_ROCKCHIP) += pcie-rockchip.o obj-$(CONFIG_PCIE_ROCKCHIP_EP) += pcie-rockchip-ep.o obj-$(CONFIG_PCIE_ROCKCHIP_HOST) += pcie-rockchip-host.o obj-$(CONFIG_PCIE_MEDIATEK) += pcie-mediatek.o +obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o obj-$(CONFIG_VMD) += vmd.o # pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index cf0aa7cee5b0..a939e8d31735 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -23,6 +23,8 @@ #include <linux/platform_device.h> #include <linux/slab.h> +#include "../pci.h" + /* register offsets and bit positions */ /* @@ -130,7 +132,7 @@ struct mobiveil_pcie { void __iomem *config_axi_slave_base; /* endpoint config base */ void __iomem *csr_axi_slave_base; /* root port config base */ void __iomem *apb_csr_base; /* MSI register base */ - void __iomem *pcie_reg_base; /* Physical PCIe Controller Base */ + phys_addr_t pcie_reg_base; /* Physical PCIe Controller Base */ struct irq_domain *intx_domain; raw_spinlock_t intx_mask_lock; int irq; |