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| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2019-07-05 17:56:38 +0800 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2019-07-08 12:28:44 +0100 |
| commit | 6f3ab451aa5c2cbff33197d82fe8489cbd55ad91 (patch) | |
| tree | 550934011745bc287c12f033cd96bbcdb4f19952 /drivers/pci | |
| parent | 284441a9662cd3352396cf7d74edd9270f641916 (diff) | |
| download | linux-6f3ab451aa5c2cbff33197d82fe8489cbd55ad91.tar.bz2 | |
PCI: mobiveil: Initialize Primary/Secondary/Subordinate bus numbers
The reset value of Primary, Secondary and Subordinate bus numbers is
zero which is a broken setup.
Program a sensible default value for Primary/Secondary/Subordinate
bus numbers.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/controller/pcie-mobiveil.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index cdf15cca526e..8f561300a88e 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -561,6 +561,12 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) u32 value, pab_ctrl, type = 0; struct resource_entry *win; + /* setup bus numbers */ + value = csr_readl(pcie, PCI_PRIMARY_BUS); + value &= 0xff000000; + value |= 0x00ff0100; + csr_writel(pcie, value, PCI_PRIMARY_BUS); + /* * program Bus Master Enable Bit in Command Register in PAB Config * Space |