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authorBjorn Helgaas <bhelgaas@google.com>2017-09-07 13:24:41 -0500
committerBjorn Helgaas <bhelgaas@google.com>2017-09-07 13:24:41 -0500
commitcf2d804110d3c20dc6865ade514c44179de34855 (patch)
tree5c2281d54c5c77ee2806ea7123beb66e99ab34b0 /drivers/pci
parent27e87395ae3497ebb63942150e43999c93a83ed0 (diff)
parent0fc690a7c3f7053613dcbab6a7613bb6586d8ee2 (diff)
downloadlinux-cf2d804110d3c20dc6865ade514c44179de34855.tar.bz2
Merge branch 'pci/virtualization' into next
* pci/virtualization: PCI: Disable VF decoding before pcibios_sriov_disable() updates resources PCI: Add ACS quirk for APM X-Gene devices PCI: Mark AMD Stoney GPU ATS as broken Conflicts: drivers/pci/quirks.c
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/iov.c7
-rw-r--r--drivers/pci/quirks.c29
2 files changed, 33 insertions, 3 deletions
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 120485d6f352..ac41c8be9200 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -331,7 +331,6 @@ failed:
while (i--)
pci_iov_remove_virtfn(dev, i, 0);
- pcibios_sriov_disable(dev);
err_pcibios:
iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
pci_cfg_access_lock(dev);
@@ -339,6 +338,8 @@ err_pcibios:
ssleep(1);
pci_cfg_access_unlock(dev);
+ pcibios_sriov_disable(dev);
+
if (iov->link != dev->devfn)
sysfs_remove_link(&dev->dev.kobj, "dep_link");
@@ -357,14 +358,14 @@ static void sriov_disable(struct pci_dev *dev)
for (i = 0; i < iov->num_VFs; i++)
pci_iov_remove_virtfn(dev, i, 0);
- pcibios_sriov_disable(dev);
-
iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
pci_cfg_access_lock(dev);
pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
ssleep(1);
pci_cfg_access_unlock(dev);
+ pcibios_sriov_disable(dev);
+
if (iov->link != dev->devfn)
sysfs_remove_link(&dev->dev.kobj, "dep_link");
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 35dcd90f98c4..3821c11c9add 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4137,6 +4137,18 @@ static int pci_quirk_cavium_acs(struct pci_dev *dev, u16 acs_flags)
return acs_flags ? 0 : 1;
}
+static int pci_quirk_xgene_acs(struct pci_dev *dev, u16 acs_flags)
+{
+ /*
+ * X-Gene root matching this quirk do not allow peer-to-peer
+ * transactions with others, allowing masking out these bits as if they
+ * were unimplemented in the ACS capability.
+ */
+ acs_flags &= ~(PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
+
+ return acs_flags ? 0 : 1;
+}
+
/*
* Many Intel PCH root ports do provide ACS-like features to disable peer
* transactions and validate bus numbers in requests, but do not provide an
@@ -4385,6 +4397,8 @@ static const struct pci_dev_acs_enabled {
{ 0x10df, 0x720, pci_quirk_mf_endpoint_acs }, /* Emulex Skyhawk-R */
/* Cavium ThunderX */
{ PCI_VENDOR_ID_CAVIUM, PCI_ANY_ID, pci_quirk_cavium_acs },
+ /* APM X-Gene */
+ { PCI_VENDOR_ID_AMCC, 0xE004, pci_quirk_xgene_acs },
{ 0 }
};
@@ -4680,3 +4694,18 @@ static void quirk_no_ext_tags(struct pci_dev *pdev)
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0140, quirk_no_ext_tags);
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0142, quirk_no_ext_tags);
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0144, quirk_no_ext_tags);
+
+#ifdef CONFIG_PCI_ATS
+/*
+ * Some devices have a broken ATS implementation causing IOMMU stalls.
+ * Don't use ATS for those devices.
+ */
+static void quirk_no_ats(struct pci_dev *pdev)
+{
+ dev_info(&pdev->dev, "disabling ATS (broken on this device)\n");
+ pdev->ats_cap = 0;
+}
+
+/* AMD Stoney platform GPU */
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x98e4, quirk_no_ats);
+#endif /* CONFIG_PCI_ATS */