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| author | Bjorn Helgaas <bhelgaas@google.com> | 2019-03-06 15:30:15 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-03-06 15:30:15 -0600 |
| commit | 7733f69288572c5f2b1c291e033401a13abd0bb3 (patch) | |
| tree | aaf797b5afb88e952008f95dc9ce10311c8537af /drivers/pci/pci.c | |
| parent | 9c926ec78551f2fab7d8c654b90b30cc2a95ebf0 (diff) | |
| parent | 7cf58b79b3072029af127ae865ffc6f00f34b1f8 (diff) | |
| download | linux-7733f69288572c5f2b1c291e033401a13abd0bb3.tar.bz2 | |
Merge branch 'pci/pm'
- Blacklist Gigabyte X299 Root Port power management to fix Thunderbolt
hotplug (Mika Westerberg)
- Revert runtime PM suspend/resume callbacks that broke PME on network
cable plug (Mika Westerberg)
- Disable Data Link State Changed interrupts to prevent wakeup
immediately after suspend (Mika Westerberg)
* pci/pm:
PCI/PME: Fix possible use-after-free on remove
PCI/PME: Fix hotplug/sysfs remove deadlock in pcie_pme_remove()
PCI: pciehp: Disable Data Link Layer State Changed event on suspend
Revert "PCI/PME: Implement runtime PM callbacks"
PCI: Blacklist power management of Gigabyte X299 DESIGNARE EX PCIe ports
Diffstat (limited to 'drivers/pci/pci.c')
| -rw-r--r-- | drivers/pci/pci.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 56b9db4c658e..bdb442004537 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -2545,6 +2545,25 @@ void pci_config_pm_runtime_put(struct pci_dev *pdev) pm_runtime_put_sync(parent); } +static const struct dmi_system_id bridge_d3_blacklist[] = { +#ifdef CONFIG_X86 + { + /* + * Gigabyte X299 root port is not marked as hotplug capable + * which allows Linux to power manage it. However, this + * confuses the BIOS SMI handler so don't power manage root + * ports on that system. + */ + .ident = "X299 DESIGNARE EX-CF", + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."), + DMI_MATCH(DMI_BOARD_NAME, "X299 DESIGNARE EX-CF"), + }, + }, +#endif + { } +}; + /** * pci_bridge_d3_possible - Is it possible to put the bridge into D3 * @bridge: Bridge to check @@ -2590,6 +2609,9 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge) if (bridge->is_hotplug_bridge) return false; + if (dmi_check_system(bridge_d3_blacklist)) + return false; + /* * It should be safe to put PCIe ports from 2015 or newer * to D3. |