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authorYijing Wang <wangyijing@huawei.com>2014-09-23 11:02:42 -0600
committerBjorn Helgaas <bhelgaas@google.com>2014-10-01 12:21:23 -0600
commit48c3c38f003c25d50a09d3da558667c5ecd530aa (patch)
treeaad2a4190c8622ab17b62384697cc6a356aab545 /drivers/pci/msi.c
parent81052769e48609525c452d8f078a5786b673e178 (diff)
downloadlinux-48c3c38f003c25d50a09d3da558667c5ecd530aa.tar.bz2
PCI/MSI: Remove "pos" from the struct msi_desc msi_attrib
"msi_attrib.pos" is only used for MSI (not MSI-X), and we already cache the MSI capability offset in "dev->msi_cap". Remove "pos" from the struct msi_attrib and use "dev->msi_cap" directly. [bhelgaas: changelog, fix whitespace] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/msi.c')
-rw-r--r--drivers/pci/msi.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 97d6ef67a3c8..40699a2041b5 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -574,7 +574,6 @@ static struct msi_desc *msi_setup_entry(struct pci_dev *dev)
entry->msi_attrib.entry_nr = 0;
entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
- entry->msi_attrib.pos = dev->msi_cap;
entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
if (control & PCI_MSI_FLAGS_64BIT)
@@ -678,7 +677,6 @@ static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
entry->msi_attrib.is_64 = 1;
entry->msi_attrib.entry_nr = entries[i].entry;
entry->msi_attrib.default_irq = dev->irq;
- entry->msi_attrib.pos = dev->msix_cap;
entry->mask_base = base;
list_add_tail(&entry->list, &dev->msi_list);