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authorHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>2009-08-06 11:34:34 +0900
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-09-09 13:29:33 -0700
commit5a05a9d819a328b3aae750237909aa2097adbeec (patch)
tree018b4d173c43e1f88c970de20612ce3d20481ae1 /drivers/pci/msi.c
parent583871d436bea48cc2204cee0ec8eb7025e03db6 (diff)
downloadlinux-5a05a9d819a328b3aae750237909aa2097adbeec.tar.bz2
PCI MSI: MSI-X cleanup, msix_map_region()
Cleanup based on the prototype from Matthew Milcox. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/msi.c')
-rw-r--r--drivers/pci/msi.c32
1 files changed, 19 insertions, 13 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 7085d665db01..b0cc82123cc7 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -432,6 +432,21 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
return 0;
}
+static void __iomem *msix_map_region(struct pci_dev *dev, unsigned pos,
+ unsigned nr_entries)
+{
+ unsigned long phys_addr;
+ u32 table_offset;
+ u8 bir;
+
+ pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
+ bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
+ table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
+ phys_addr = pci_resource_start(dev, bir) + table_offset;
+
+ return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
+}
+
/**
* msix_capability_init - configure device's MSI-X capability
* @dev: pointer to the pci_dev data structure of MSI-X device function
@@ -446,11 +461,8 @@ static int msix_capability_init(struct pci_dev *dev,
struct msix_entry *entries, int nvec)
{
struct msi_desc *entry;
- int pos, i, j, nr_entries, ret;
- unsigned long phys_addr;
- u32 table_offset;
- u16 control;
- u8 bir;
+ int pos, i, j, ret;
+ u16 control;
void __iomem *base;
pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
@@ -461,14 +473,8 @@ static int msix_capability_init(struct pci_dev *dev,
pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
/* Request & Map MSI-X table region */
- nr_entries = multi_msix_capable(control);
-
- pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
- bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
- table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
- phys_addr = pci_resource_start (dev, bir) + table_offset;
- base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
- if (base == NULL)
+ base = msix_map_region(dev, pos, multi_msix_capable(control));
+ if (!base)
return -ENOMEM;
for (i = 0; i < nvec; i++) {