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authorLinus Torvalds <torvalds@linux-foundation.org>2019-09-19 13:48:37 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2019-09-19 13:48:37 -0700
commite3a008ac1213d99f5f1210adc9d2a1f60da10c3b (patch)
tree4d4d13f81cb06eb278de0bf601346b73f38534be /drivers/of
parent671df189537883f36cf9c7d4f9495bfac0f86627 (diff)
parent59e9fcf8772bd97b6d681706fb8c9a972500c524 (diff)
downloadlinux-e3a008ac1213d99f5f1210adc9d2a1f60da10c3b.tar.bz2
Merge tag 'devicetree-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull Devicetree updates from Rob Herring: - a bunch of DT binding conversions to DT schema format - clean-ups of the Arm idle-states binding - support a default number of cells in of_for_each_phandle() when the cells name is missing - expose dtbs_check and dt_binding_check in the make help - convert writting-schema.md to ReST - HiSilicon reset controller binding updates - add documentation for MT8516 RNG * tag 'devicetree-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (46 commits) of: restore old handling of cells_name=NULL in of_*_phandle_with_args() bus: qcom: fix spelling mistake "ambigous" -> "ambiguous" of: Let of_for_each_phandle fallback to non-negative cell_count iommu: pass cell_count = -1 to of_for_each_phandle with cells_name dt-bindings: arm: Convert Realtek board/soc bindings to json-schema dt-bindings: arm: Convert Actions Semi bindings to jsonschema dt-bindings: Correct spelling in example schema dt-bindings: cpu: Add a support cpu type for cortex-a55 dt-bindings: gpu: mali-midgard: Add samsung exynos5250 compatible dt-bindings: arm: idle-states: Move exit-latency-us explanation dt-bindings: arm: idle-states: Add punctuation to improve readability dt-bindings: arm: idle-states: Correct "constraint guarantees" dt-bindings: arm: idle-states: Correct references to wake-up delay dt-bindings: arm: idle-states: Use "e.g." and "i.e." consistently pinctrl-mcp23s08: Fix property-name in dt-example dt-bindings: Clarify interrupts-extended usage dt-bindings: Convert Arm Mali Utgard GPU to DT schema dt-bindings: Convert Arm Mali Bifrost GPU to DT schema dt-bindings: Convert Arm Mali Midgard GPU to DT schema dt-bindings: irq: Convert Allwinner NMI Controller to a schema ...
Diffstat (limited to 'drivers/of')
-rw-r--r--drivers/of/base.c58
-rw-r--r--drivers/of/unittest.c4
2 files changed, 52 insertions, 10 deletions
diff --git a/drivers/of/base.c b/drivers/of/base.c
index 55e7f5bb0549..1d667eb730e1 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -1286,6 +1286,13 @@ int of_phandle_iterator_init(struct of_phandle_iterator *it,
memset(it, 0, sizeof(*it));
+ /*
+ * one of cell_count or cells_name must be provided to determine the
+ * argument length.
+ */
+ if (cell_count < 0 && !cells_name)
+ return -EINVAL;
+
list = of_get_property(np, list_name, &size);
if (!list)
return -ENOENT;
@@ -1335,11 +1342,20 @@ int of_phandle_iterator_next(struct of_phandle_iterator *it)
if (of_property_read_u32(it->node, it->cells_name,
&count)) {
- pr_err("%pOF: could not get %s for %pOF\n",
- it->parent,
- it->cells_name,
- it->node);
- goto err;
+ /*
+ * If both cell_count and cells_name is given,
+ * fall back to cell_count in absence
+ * of the cells_name property
+ */
+ if (it->cell_count >= 0) {
+ count = it->cell_count;
+ } else {
+ pr_err("%pOF: could not get %s for %pOF\n",
+ it->parent,
+ it->cells_name,
+ it->node);
+ goto err;
+ }
}
} else {
count = it->cell_count;
@@ -1503,10 +1519,17 @@ int of_parse_phandle_with_args(const struct device_node *np, const char *list_na
const char *cells_name, int index,
struct of_phandle_args *out_args)
{
+ int cell_count = -1;
+
if (index < 0)
return -EINVAL;
- return __of_parse_phandle_with_args(np, list_name, cells_name, 0,
- index, out_args);
+
+ /* If cells_name is NULL we assume a cell count of 0 */
+ if (!cells_name)
+ cell_count = 0;
+
+ return __of_parse_phandle_with_args(np, list_name, cells_name,
+ cell_count, index, out_args);
}
EXPORT_SYMBOL(of_parse_phandle_with_args);
@@ -1588,7 +1611,7 @@ int of_parse_phandle_with_args_map(const struct device_node *np,
if (!pass_name)
goto free;
- ret = __of_parse_phandle_with_args(np, list_name, cells_name, 0, index,
+ ret = __of_parse_phandle_with_args(np, list_name, cells_name, -1, index,
out_args);
if (ret)
goto free;
@@ -1756,7 +1779,24 @@ int of_count_phandle_with_args(const struct device_node *np, const char *list_na
struct of_phandle_iterator it;
int rc, cur_index = 0;
- rc = of_phandle_iterator_init(&it, np, list_name, cells_name, 0);
+ /*
+ * If cells_name is NULL we assume a cell count of 0. This makes
+ * counting the phandles trivial as each 32bit word in the list is a
+ * phandle and no arguments are to consider. So we don't iterate through
+ * the list but just use the length to determine the phandle count.
+ */
+ if (!cells_name) {
+ const __be32 *list;
+ int size;
+
+ list = of_get_property(np, list_name, &size);
+ if (!list)
+ return -ENOENT;
+
+ return size / sizeof(*list);
+ }
+
+ rc = of_phandle_iterator_init(&it, np, list_name, cells_name, -1);
if (rc)
return rc;
diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c
index e6b175370f2e..480a21e2ed39 100644
--- a/drivers/of/unittest.c
+++ b/drivers/of/unittest.c
@@ -1044,8 +1044,10 @@ static void __init of_unittest_platform_populate(void)
test_bus = platform_device_register_full(&test_bus_info);
rc = PTR_ERR_OR_ZERO(test_bus);
unittest(!rc, "testbus registration failed; rc=%i\n", rc);
- if (rc)
+ if (rc) {
+ of_node_put(np);
return;
+ }
test_bus->dev.of_node = np;
/*