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authorChristoph Hellwig <hch@lst.de>2017-09-11 12:09:28 -0400
committerChristoph Hellwig <hch@lst.de>2017-09-11 12:29:40 -0400
commit044a9df1a7cbb89f48fcc0e9e39997989342966b (patch)
tree0bb6cdf7a6d92428d4198597d12950121caf72d7 /drivers/nvme/host/nvme.h
parent9620cfba97a8b88ae91f0e275e8ff110b578bb6e (diff)
downloadlinux-044a9df1a7cbb89f48fcc0e9e39997989342966b.tar.bz2
nvme-pci: implement the HMB entry number and size limitations
Adds support for the new Host Memory Buffer Minimum Descriptor Entry Size and Host Memory Maximum Descriptors Entries field that were added in TP 4002 HMB Enhancements. These allow the controller to advertise limits for the usual number of segments in the host memory buffer, as well as a minimum usable per-segment size. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Keith Busch <keith.busch@intel.com>
Diffstat (limited to 'drivers/nvme/host/nvme.h')
-rw-r--r--drivers/nvme/host/nvme.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/nvme/host/nvme.h b/drivers/nvme/host/nvme.h
index b8ba7c85e61b..d3f3c4447515 100644
--- a/drivers/nvme/host/nvme.h
+++ b/drivers/nvme/host/nvme.h
@@ -181,8 +181,11 @@ struct nvme_ctrl {
u64 ps_max_latency_us;
bool apst_enabled;
+ /* PCIe only: */
u32 hmpre;
u32 hmmin;
+ u32 hmminds;
+ u16 hmmaxd;
/* Fabrics only */
u16 sqsize;