diff options
author | Felix Fietkau <nbd@nbd.name> | 2019-03-08 19:50:21 +0100 |
---|---|---|
committer | Felix Fietkau <nbd@nbd.name> | 2019-05-01 13:03:59 +0200 |
commit | 0f66947bffe6cf630d37a6ec75f654d330ec66a4 (patch) | |
tree | 2966a99be522a0cf98a8a5eccdb64cb7715c40ab /drivers/net/wireless/mediatek/mt76 | |
parent | 6fe533378795f87bfa5075520742116f13d30ed3 (diff) | |
download | linux-0f66947bffe6cf630d37a6ec75f654d330ec66a4.tar.bz2 |
mt76: mt7603: fix initialization of max rx length
The previous version only accidentally disabled A-MSDU deaggregation by
using the wrong mask for rx length configuration, which left previous
length value in place.
Fix the length and initialize the register completely to keep A-MSDU
de-aggregation remaining disabled
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'drivers/net/wireless/mediatek/mt76')
-rw-r--r-- | drivers/net/wireless/mediatek/mt76/mt7603/init.c | 3 | ||||
-rw-r--r-- | drivers/net/wireless/mediatek/mt76/mt7603/regs.h | 4 |
2 files changed, 6 insertions, 1 deletions
diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/init.c b/drivers/net/wireless/mediatek/mt76/mt7603/init.c index d394839f1bd8..0d347ac6dfa6 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7603/init.c +++ b/drivers/net/wireless/mediatek/mt76/mt7603/init.c @@ -167,7 +167,8 @@ mt7603_mac_init(struct mt7603_dev *dev) FIELD_PREP(MT_AGG_RETRY_CONTROL_BAR_LIMIT, 1) | FIELD_PREP(MT_AGG_RETRY_CONTROL_RTS_LIMIT, 15)); - mt76_rmw(dev, MT_DMA_DCR0, ~0xfffc, 4096); + mt76_wr(dev, MT_DMA_DCR0, MT_DMA_DCR0_RX_VEC_DROP | + FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 4096)); mt76_rmw(dev, MT_DMA_VCFR0, BIT(0), BIT(13)); mt76_rmw(dev, MT_DMA_TMCFR0, BIT(0) | BIT(1), BIT(13)); diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/regs.h b/drivers/net/wireless/mediatek/mt76/mt7603/regs.h index da6827ae6cee..9d257d5c309d 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7603/regs.h +++ b/drivers/net/wireless/mediatek/mt76/mt7603/regs.h @@ -233,6 +233,10 @@ #define MT_WF_DMA(ofs) (MT_WF_DMA_BASE + (ofs)) #define MT_DMA_DCR0 MT_WF_DMA(0x000) +#define MT_DMA_DCR0_MAX_RX_LEN GENMASK(15, 0) +#define MT_DMA_DCR0_DAMSDU BIT(16) +#define MT_DMA_DCR0_RX_VEC_DROP BIT(17) + #define MT_DMA_DCR1 MT_WF_DMA(0x004) #define MT_DMA_FQCR0 MT_WF_DMA(0x008) |