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authorMichael Chan <mchan@broadcom.com>2005-08-09 20:17:28 -0700
committerDavid S. Miller <davem@sunset.davemloft.net>2005-08-29 15:50:45 -0700
commit15f5a585c6b8dac31ed0a55693aacf51934f0f5d (patch)
tree3c24f5536451b44d53e58373f9d4718ae25ca094 /drivers/net/tg3.c
parent6892914fb7980d844f2bac859f4095df9ebd18da (diff)
downloadlinux-15f5a585c6b8dac31ed0a55693aacf51934f0f5d.tar.bz2
[TG3]: Eliminate one register write in tg3_restart_ints()
The register write to register 0x68 to restart interrupts is unnecessary as the interrupt wasn't masked in that register by the irq handler. This will save one register write in the fast path. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 3a7cfb81bf89..8bc28b14c70f 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -533,8 +533,6 @@ static inline unsigned int tg3_has_work(struct tg3 *tp)
*/
static void tg3_restart_ints(struct tg3 *tp)
{
- tw32(TG3PCI_MISC_HOST_CTRL,
- (tp->misc_host_ctrl & ~MISC_HOST_CTRL_MASK_PCI_INT));
tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW,
tp->last_tag << 24);
mmiowb();