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authorDejin Zheng <zhengdejin5@gmail.com>2020-03-23 23:05:58 +0800
committerDavid S. Miller <davem@davemloft.net>2020-03-23 22:00:02 -0700
commit745a237c18f3f5bfe094e458f9bea5a72831ff1e (patch)
tree32c3685afa70be046d0539ba99258e6469138e92 /drivers/net/phy
parentfcbd30d09ba05389cb40cc1769b565df62aead35 (diff)
downloadlinux-745a237c18f3f5bfe094e458f9bea5a72831ff1e.tar.bz2
net: phy: use phy_read_poll_timeout() to simplify the code
use phy_read_poll_timeout() to replace the poll codes for simplify the code in phy_poll_reset() function. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/phy_device.c16
1 files changed, 5 insertions, 11 deletions
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index a585faf8b844..3b8f6b0b47b5 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -1059,18 +1059,12 @@ EXPORT_SYMBOL(phy_disconnect);
static int phy_poll_reset(struct phy_device *phydev)
{
/* Poll until the reset bit clears (50ms per retry == 0.6 sec) */
- unsigned int retries = 12;
- int ret;
-
- do {
- msleep(50);
- ret = phy_read(phydev, MII_BMCR);
- if (ret < 0)
- return ret;
- } while (ret & BMCR_RESET && --retries);
- if (ret & BMCR_RESET)
- return -ETIMEDOUT;
+ int ret, val;
+ ret = phy_read_poll_timeout(phydev, MII_BMCR, val, !(val & BMCR_RESET),
+ 50000, 600000, true);
+ if (ret)
+ return ret;
/* Some chips (smsc911x) may still need up to another 1ms after the
* BMCR_RESET bit is cleared before they are usable.
*/