diff options
| author | Mugunthan V N <mugunthanvnm@ti.com> | 2013-06-03 20:10:06 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2013-06-04 14:17:21 -0700 |
| commit | 1ca6d1b1aef4628ff0fe458135ddb008d134ad8f (patch) | |
| tree | 314e9805e0cdacec652c91501e0a7afaea7f880d /drivers/net/phy | |
| parent | ea13c9ee855cc60973458d1adeee9b35f0466a29 (diff) | |
| download | linux-1ca6d1b1aef4628ff0fe458135ddb008d134ad8f.tar.bz2 | |
drivers: net: phy: at803x: add interface mode support
This patch adds support for RGMII TX delay configuration on Atheros 803X,
this can be enabled in debug registers. With this patch,
PHY_INTERFACE_MODE_RGMII_TXID modes are now supported.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
| -rw-r--r-- | drivers/net/phy/at803x.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index 63444b7b7013..dda07edf4173 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -27,6 +27,10 @@ #define AT803X_MMD_ACCESS_CONTROL 0x0D #define AT803X_MMD_ACCESS_CONTROL_DATA 0x0E #define AT803X_FUNC_DATA 0x4003 +#define AT803X_DEBUG_ADDR 0x1D +#define AT803X_DEBUG_DATA 0x1E +#define AT803X_DEBUG_SYSTEM_MODE_CTRL 0x05 +#define AT803X_DEBUG_RGMII_TX_CLK_DLY BIT(8) MODULE_DESCRIPTION("Atheros 803x PHY driver"); MODULE_AUTHOR("Matus Ujhelyi"); @@ -99,6 +103,7 @@ static void at803x_get_wol(struct phy_device *phydev, static int at803x_config_init(struct phy_device *phydev) { int val; + int ret; u32 features; features = SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_AUI | @@ -133,6 +138,17 @@ static int at803x_config_init(struct phy_device *phydev) phydev->supported = features; phydev->advertising = features; + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { + ret = phy_write(phydev, AT803X_DEBUG_ADDR, + AT803X_DEBUG_SYSTEM_MODE_CTRL); + if (ret) + return ret; + ret = phy_write(phydev, AT803X_DEBUG_DATA, + AT803X_DEBUG_RGMII_TX_CLK_DLY); + if (ret) + return ret; + } + return 0; } |