diff options
| author | Mark Brown <broonie@sirena.org.uk> | 2008-01-27 13:58:11 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-02-03 04:28:42 -0800 |
| commit | 6344f0521aac9f93c312826216762f2185268390 (patch) | |
| tree | 984ded12f15cb5ce71376ba6c6be3e72d3002427 /drivers/net/natsemi.c | |
| parent | 35b5f6b1a82b5c586e0b24c711dc6ba944e88ef1 (diff) | |
| download | linux-6344f0521aac9f93c312826216762f2185268390.tar.bz2 | |
natsemi: Update locking documentation
The documentation regarding synchronisation at the head of the natsemi
driver was badly bitrotted so replace it with a general statement about
the techniques used which is less likely to bitrot.
Also remove the note saying these chips are uncommon - it makes little
difference but they were used in a number of laptops and at least one mass
market PCI ethernet card.
Signed-off-by: Mark Brown <broonie@sirena.org.uk>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/natsemi.c')
| -rw-r--r-- | drivers/net/natsemi.c | 18 |
1 files changed, 2 insertions, 16 deletions
diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c index c329a4f5840c..0a3e60418e53 100644 --- a/drivers/net/natsemi.c +++ b/drivers/net/natsemi.c @@ -203,22 +203,8 @@ skbuff at an offset of "+2", 16-byte aligning the IP header. IIId. Synchronization Most operations are synchronized on the np->lock irq spinlock, except the -performance critical codepaths: - -The rx process only runs in the interrupt handler. Access from outside -the interrupt handler is only permitted after disable_irq(). - -The rx process usually runs under the netif_tx_lock. If np->intr_tx_reap -is set, then access is permitted under spin_lock_irq(&np->lock). - -Thus configuration functions that want to access everything must call - disable_irq(dev->irq); - netif_tx_lock_bh(dev); - spin_lock_irq(&np->lock); - -IV. Notes - -NatSemi PCI network controllers are very uncommon. +recieve and transmit paths which are synchronised using a combination of +hardware descriptor ownership, disabling interrupts and NAPI poll scheduling. IVb. References |