diff options
| author | Yijing Wang <wangyijing@huawei.com> | 2013-08-08 21:02:56 +0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2013-08-09 13:49:51 -0700 |
| commit | b83082e95ecb95b5da9e6c54d4714ea73c49b58d (patch) | |
| tree | 1c631cfd1b1e705b4e8276427842d1956cade4bd /drivers/net/ethernet/qlogic/netxen | |
| parent | 40b295625053954f69d6840d59f2b4d8be251ed3 (diff) | |
| download | linux-b83082e95ecb95b5da9e6c54d4714ea73c49b58d.tar.bz2 | |
netxen: clean up unnecessary MSI/MSI-X capability find
PCI core will initialize device MSI/MSI-X capability in
pci_msi_init_pci_dev(). So device driver should use
pci_dev->msi_cap/msix_cap to determine whether the device
support MSI/MSI-X instead of using
pci_find_capability(pci_dev, PCI_CAP_ID_MSI/MSIX).
Access to PCIe device config space again will consume more time.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Cc: Manish Chopra <manish.chopra@qlogic.com>
Cc: Sony Chacko <sony.chacko@qlogic.com>
Cc: Rajesh Borundia <rajesh.borundia@qlogic.com>
Cc: netdev@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/qlogic/netxen')
| -rw-r--r-- | drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c b/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c index c401b0b4353d..1046e9461509 100644 --- a/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c +++ b/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c @@ -459,16 +459,14 @@ static void netxen_pcie_strap_init(struct netxen_adapter *adapter) static void netxen_set_msix_bit(struct pci_dev *pdev, int enable) { u32 control; - int pos; - pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX); - if (pos) { - pci_read_config_dword(pdev, pos, &control); + if (pdev->msix_cap) { + pci_read_config_dword(pdev, pdev->msix_cap, &control); if (enable) control |= PCI_MSIX_FLAGS_ENABLE; else control = 0; - pci_write_config_dword(pdev, pos, control); + pci_write_config_dword(pdev, pdev->msix_cap, control); } } |