diff options
| author | Saeed Mahameed <saeedm@mellanox.com> | 2018-11-19 10:52:42 -0800 |
|---|---|---|
| committer | Leon Romanovsky <leonro@mellanox.com> | 2018-11-20 20:07:51 +0200 |
| commit | 6d2d6fc83a281d51863fb5d08b59333ed1b46cc1 (patch) | |
| tree | d5d2d14e0d962b10edbd9afc0417f431627df4de /drivers/net/ethernet/mellanox/mlx5/core/eq.c | |
| parent | d5d284b829a6eb7127df24d1bd3896a698981e62 (diff) | |
| download | linux-6d2d6fc83a281d51863fb5d08b59333ed1b46cc1.tar.bz2 | |
net/mlx5: EQ, Make EQE access methods inline
These are one/two liner generic EQ access methods, better have them
declared static inline in eq.h.
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/eq.c')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/eq.c | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eq.c b/drivers/net/ethernet/mellanox/mlx5/core/eq.c index 895401609c63..6ba8e401a0c7 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/eq.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/eq.c @@ -46,7 +46,6 @@ #include "diag/fw_tracer.h" enum { - MLX5_EQE_SIZE = sizeof(struct mlx5_eqe), MLX5_EQE_OWNER_INIT_VAL = 0x1, }; @@ -103,18 +102,6 @@ static int mlx5_cmd_destroy_eq(struct mlx5_core_dev *dev, u8 eqn) return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); } -static struct mlx5_eqe *get_eqe(struct mlx5_eq *eq, u32 entry) -{ - return mlx5_buf_offset(&eq->buf, entry * MLX5_EQE_SIZE); -} - -static struct mlx5_eqe *next_eqe_sw(struct mlx5_eq *eq) -{ - struct mlx5_eqe *eqe = get_eqe(eq, eq->cons_index & (eq->nent - 1)); - - return ((eqe->owner & 1) ^ !!(eq->cons_index & eq->nent)) ? NULL : eqe; -} - static const char *eqe_type_str(u8 type) { switch (type) { @@ -202,16 +189,6 @@ static enum mlx5_dev_event port_subtype_event(u8 subtype) return -1; } -static void eq_update_ci(struct mlx5_eq *eq, int arm) -{ - __be32 __iomem *addr = eq->doorbell + (arm ? 0 : 2); - u32 val = (eq->cons_index & 0xffffff) | (eq->eqn << 24); - - __raw_writel((__force u32)cpu_to_be32(val), addr); - /* We still want ordering, just not swabbing, so add a barrier */ - mb(); -} - static void general_event_handler(struct mlx5_core_dev *dev, struct mlx5_eqe *eqe) { |