diff options
| author | Oleksij Rempel <o.rempel@pengutronix.de> | 2022-08-26 12:56:28 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2022-08-31 09:41:23 +0100 |
| commit | 5bd3ecd121e34370b4d5a02de925335655bbaa9a (patch) | |
| tree | c1c9eb488045098f19f6a47baf103a2d04d24f86 /drivers/net/dsa/microchip | |
| parent | 41131bac9a9adf98024d129d676c09cdf72b7de7 (diff) | |
| download | linux-5bd3ecd121e34370b4d5a02de925335655bbaa9a.tar.bz2 | |
net: dsa: microchip: ksz9477: remove MII_CTRL1000 check from ksz9477_w_phy()
The reason why PHYlib may access MII_CTRL1000 on the chip without GBit
support is only if chip provides wrong information about extended caps
register. This issue is now handled by ksz9477_r_phy_quirks()
With proper regmap_ranges provided for all chips we will be able to
catch this kind of bugs any way. So, remove this sanity check.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/microchip')
| -rw-r--r-- | drivers/net/dsa/microchip/ksz9477.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c index fb9de6b447b1..f0c81d90c99f 100644 --- a/drivers/net/dsa/microchip/ksz9477.c +++ b/drivers/net/dsa/microchip/ksz9477.c @@ -341,10 +341,6 @@ int ksz9477_w_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 val) if (addr >= dev->phy_port_cnt) return 0; - /* No gigabit support. Do not write to this register. */ - if (!dev->info->gbit_capable[addr] && reg == MII_CTRL1000) - return -ENXIO; - return ksz_pwrite16(dev, addr, 0x100 + (reg << 1), val); } |