diff options
| author | Divy Le Ray <divy@chelsio.com> | 2007-05-30 10:01:39 -0700 |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2007-06-20 19:16:58 -0400 |
| commit | c706bfb52afc9b5d115f61a8e1c0c30540feb3f4 (patch) | |
| tree | 22650d8837c7037e43f8e2a53a8821a94bac2949 /drivers/net/cxgb3 | |
| parent | 890de332834a95450a74e5f615f4f9a0fa564623 (diff) | |
| download | linux-c706bfb52afc9b5d115f61a8e1c0c30540feb3f4.tar.bz2 | |
cxgb3 - Fix direct XAUI support
Check all lanes for link status on direct XAUI cards.
Don't assume that direct XAUI always uses XGMAC 1.
Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/cxgb3')
| -rw-r--r-- | drivers/net/cxgb3/ael1002.c | 10 | ||||
| -rw-r--r-- | drivers/net/cxgb3/regs.h | 2 |
2 files changed, 10 insertions, 2 deletions
diff --git a/drivers/net/cxgb3/ael1002.c b/drivers/net/cxgb3/ael1002.c index 73a41e6a5bfc..ee140e63ddc5 100644 --- a/drivers/net/cxgb3/ael1002.c +++ b/drivers/net/cxgb3/ael1002.c @@ -219,7 +219,13 @@ static int xaui_direct_get_link_status(struct cphy *phy, int *link_ok, unsigned int status; status = t3_read_reg(phy->adapter, - XGM_REG(A_XGM_SERDES_STAT0, phy->addr)); + XGM_REG(A_XGM_SERDES_STAT0, phy->addr)) | + t3_read_reg(phy->adapter, + XGM_REG(A_XGM_SERDES_STAT1, phy->addr)) | + t3_read_reg(phy->adapter, + XGM_REG(A_XGM_SERDES_STAT2, phy->addr)) | + t3_read_reg(phy->adapter, + XGM_REG(A_XGM_SERDES_STAT3, phy->addr)); *link_ok = !(status & F_LOWSIG0); } if (speed) @@ -247,5 +253,5 @@ static struct cphy_ops xaui_direct_ops = { void t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter, int phy_addr, const struct mdio_ops *mdio_ops) { - cphy_init(phy, adapter, 1, &xaui_direct_ops, mdio_ops); + cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops); } diff --git a/drivers/net/cxgb3/regs.h b/drivers/net/cxgb3/regs.h index e5a553410e24..bf9d6be7f214 100644 --- a/drivers/net/cxgb3/regs.h +++ b/drivers/net/cxgb3/regs.h @@ -2128,6 +2128,8 @@ #define F_RESETPLL01 V_RESETPLL01(1U) #define A_XGM_SERDES_STAT0 0x8f0 +#define A_XGM_SERDES_STAT1 0x8f4 +#define A_XGM_SERDES_STAT2 0x8f8 #define S_LOWSIG0 0 #define V_LOWSIG0(x) ((x) << S_LOWSIG0) |