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authorJohn Crispin <john@phrozen.org>2016-06-20 23:32:09 +0200
committerBoris Brezillon <boris.brezillon@free-electrons.com>2016-07-11 08:40:15 +0200
commitf45eb7b522359260606852d79a8899e5db37d8f3 (patch)
tree5e11a4959ee19d1c4f52c10a93f574b3867a2fd4 /drivers/mtd
parent024366750c2e04fdcda8bca685194ef0196b35fe (diff)
downloadlinux-f45eb7b522359260606852d79a8899e5db37d8f3.tar.bz2
mtd: nand: xway: Avoid messing up with IO_ADDR_W in ->cmd_ctrl()
The ->cmd_ctrl() function is adjusting the ->IO_ADDR_W value depending on the command type each time NAND_CTRL_CHANGE is passed. This is not only useless but can lead to an ->IO_ADDR_W corruption. Get rid of this logic and rely on the NAND_CLE and NAND_ALE flags to deduce the iomem address to write the cmd argument to. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/xway_nand.c26
1 files changed, 11 insertions, 15 deletions
diff --git a/drivers/mtd/nand/xway_nand.c b/drivers/mtd/nand/xway_nand.c
index ec189e5b4459..6028edbad644 100644
--- a/drivers/mtd/nand/xway_nand.c
+++ b/drivers/mtd/nand/xway_nand.c
@@ -107,22 +107,18 @@ static void xway_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
unsigned long nandaddr = (unsigned long) this->IO_ADDR_W;
unsigned long flags;
- if (ctrl & NAND_CTRL_CHANGE) {
- nandaddr &= ~(NAND_WRITE_CMD | NAND_WRITE_ADDR);
- if (ctrl & NAND_CLE)
- nandaddr |= NAND_WRITE_CMD;
- else
- nandaddr |= NAND_WRITE_ADDR;
- this->IO_ADDR_W = (void __iomem *) nandaddr;
- }
+ if (cmd == NAND_CMD_NONE)
+ return;
- if (cmd != NAND_CMD_NONE) {
- spin_lock_irqsave(&ebu_lock, flags);
- writeb(cmd, this->IO_ADDR_W);
- while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
- ;
- spin_unlock_irqrestore(&ebu_lock, flags);
- }
+ spin_lock_irqsave(&ebu_lock, flags);
+ if (ctrl & NAND_CLE)
+ writeb(cmd, (void __iomem *) (nandaddr | NAND_WRITE_CMD));
+ else if (ctrl & NAND_ALE)
+ writeb(cmd, (void __iomem *) (nandaddr | NAND_WRITE_ADDR));
+
+ while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
+ ;
+ spin_unlock_irqrestore(&ebu_lock, flags);
}
static int xway_dev_ready(struct mtd_info *mtd)