diff options
author | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-23 23:25:53 +0200 |
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committer | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-23 23:25:53 +0200 |
commit | 7abd3ef9875eb2afcdcd4f450680298a2983a55e (patch) | |
tree | 64c19d2e5ecca182938acfcb8a172efb7d907d85 /drivers/mtd/nand/rtc_from4.c | |
parent | 3821720d51b5f304d2c33021a82c8da70f6d6ac9 (diff) | |
download | linux-7abd3ef9875eb2afcdcd4f450680298a2983a55e.tar.bz2 |
[MTD] Refactor NAND hwcontrol to cmd_ctrl
The hwcontrol function enforced a step by step state machine
for any kind of hardware chip access. Let the hardware driver
know which control bits are set and inform it about a change
of the control lines. Let the hardware driver write out the
command and address bytes directly. This gives a peformance
advantage for address bus controlled chips and simplifies the
quirks in the hardware drivers.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/mtd/nand/rtc_from4.c')
-rw-r--r-- | drivers/mtd/nand/rtc_from4.c | 34 |
1 files changed, 10 insertions, 24 deletions
diff --git a/drivers/mtd/nand/rtc_from4.c b/drivers/mtd/nand/rtc_from4.c index f8e631c89a60..6c97bfaea19a 100644 --- a/drivers/mtd/nand/rtc_from4.c +++ b/drivers/mtd/nand/rtc_from4.c @@ -208,32 +208,18 @@ static uint8_t revbits[256] = { * Address lines (A24-A22), so no action is required here. * */ -static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd) +static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd, + unsigned int ctrl) { - struct nand_chip *this = (struct nand_chip *)(mtd->priv); + struct nand_chip *chip = (mtd->priv); - switch (cmd) { + if (cmd == NAND_CMD_NONE) + return; - case NAND_CTL_SETCLE: - this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_CLE); - break; - case NAND_CTL_CLRCLE: - this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W & ~RTC_FROM4_CLE); - break; - - case NAND_CTL_SETALE: - this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_ALE); - break; - case NAND_CTL_CLRALE: - this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W & ~RTC_FROM4_ALE); - break; - - case NAND_CTL_SETNCE: - break; - case NAND_CTL_CLRNCE: - break; - - } + if (ctrl & NAND_CLE) + writeb(cmd, chip->IO_ADDR_W | RTC_FROM4_CLE); + else + writeb(cmd, chip->IO_ADDR_W | RTC_FROM4_ALE); } /* @@ -559,7 +545,7 @@ static int __init rtc_from4_init(void) this->IO_ADDR_R = rtc_from4_fio_base; this->IO_ADDR_W = rtc_from4_fio_base; /* Set address of hardware control function */ - this->hwcontrol = rtc_from4_hwcontrol; + this->cmd_ctrl = rtc_from4_hwcontrol; /* Set address of chip select function */ this->select_chip = rtc_from4_nand_select_chip; /* command delay time (in us) */ |