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authorBoris Brezillon <boris.brezillon@collabora.com>2019-02-25 09:28:54 +0100
committerBoris Brezillon <boris.brezillon@collabora.com>2019-02-25 09:28:54 +0100
commit9220d7befc9c28bf714701e6e26163644750d871 (patch)
tree10eabdf3fb0a962b37ed4a04ece1f48795f9f181 /drivers/mtd/nand/raw/nand_legacy.c
parentdfbd39956a979029d779d47855ef84834dd4b203 (diff)
parent53bcbb839438df54024d97e8e698d21329d2c9a0 (diff)
downloadlinux-9220d7befc9c28bf714701e6e26163644750d871.tar.bz2
Merge tag 'nand/for-5.1' of git://git.infradead.org/linux-mtd into mtd/next
NAND core changes: - Fourth batch of fixes/cleanup to the raw NAND core impacting various controller drivers (Sunxi, Marvell, MTK, TMIO, OMAP2). - Checking the return code of nand_reset() and nand_readid_op(). - Removing ->legacy.erase and single_erase(). - Simplifying the locking. - Several implicit fall through annotations. Raw NAND controllers drivers changes: - Fixing various possible object reference leaks (MTK, JZ4780, Atmel). - ST: * Adding support for STM32 FMC2 NAND flash controller. - Meson: * Adding support for Amlogic NAND flash controller. - Denali: * Several cleanup patches. - Sunxi: * Several cleanup patches. - FSMC: * Disabling NAND on remove(). * Resetting NAND timings on resume(). SPI-NAND drivers changes: - Toshiba: * Adding support for all Toshiba products. - Macronix: * Fixing ECC status read. - Gigadevice: * Adding support for GD5F1GQ4UExxG.
Diffstat (limited to 'drivers/mtd/nand/raw/nand_legacy.c')
-rw-r--r--drivers/mtd/nand/raw/nand_legacy.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/mtd/nand/raw/nand_legacy.c b/drivers/mtd/nand/raw/nand_legacy.c
index 43575943f13b..f2526ec616a6 100644
--- a/drivers/mtd/nand/raw/nand_legacy.c
+++ b/drivers/mtd/nand/raw/nand_legacy.c
@@ -331,6 +331,7 @@ static void nand_command(struct nand_chip *chip, unsigned int command,
*/
if (column == -1 && page_addr == -1)
return;
+ /* fall through */
default:
/*
@@ -483,7 +484,7 @@ static void nand_command_lp(struct nand_chip *chip, unsigned int command,
chip->legacy.cmd_ctrl(chip, NAND_CMD_NONE,
NAND_NCE | NAND_CTRL_CHANGE);
- /* This applies to read commands */
+ /* fall through - This applies to read commands */
default:
/*
* If we don't have access to the busy pin, we apply the given