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author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-01-13 11:25:54 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-01-13 11:25:54 -0800 |
commit | ac53b2e053fffc74372da94e734b92f37e70d32c (patch) | |
tree | cda82af0fcded5d230e9f56104d3988b7a75c8aa /drivers/mtd/nand/lpc32xx_mlc.c | |
parent | cf09112d160e6db21ff8427ce696f819b957423b (diff) | |
parent | 9146cbd52b11d4ade62dba8f238ec5e421c3fa2b (diff) | |
download | linux-ac53b2e053fffc74372da94e734b92f37e70d32c.tar.bz2 |
Merge tag 'for-linus-20160112' of git://git.infradead.org/linux-mtd
Pull MTD updates from Brian Norris:
"Generic MTD:
- populate the MTD device 'of_node' field (and get a proper 'of_node'
symlink in sysfs)
This yielded some new helper functions, and changes across a
variety of drivers
- partitioning cleanups, to prepare for better device-tree based
partitioning in the future
Eliminate a lot of boilerplate for drivers that want to use
OF-based partition parsing
The DT bindings for this didn't settle yet, so most non-cleanup
portions are deferred for a future release
NAND:
- embed a struct mtd_info inside struct nand_chip
This is really long overdue; too many drivers have to do the same
silly boilerplate to allocate and link up two "independent"
structs, when in fact, everyone is assuming there is an exact 1:1
relationship between a NAND chips struct and its underlying MTD.
This aids improved helpers and should make certain abstractions
easier in the future.
Also causes a lot of churn, helped along by some automated code
transformations
- add more core support for detecting (and "correcting") bitflips in
erased pages; requires opt-in by drivers, but at least we kill a
few bad implementations and hopefully stave off future ones
- pxa3xx_nand: cleanups, a few fixes, and PM improvements
- new JZ4780 NAND driver
SPI NOR:
- provide default erase function, for controllers that just want to
send the SECTOR_ERASE command directly
- fix some module auto-loading issues with device tree
("jedec,spi-nor")
- error handling fixes
- new Mediatek QSPI flash driver
Other:
- cfi: force valid geometry Kconfig (finally!)
This one used to trip up randconfigs occasionally, since bots
aren't deterred by big scary "advanced configuration" menus
More? Probably. See the commit logs"
* tag 'for-linus-20160112' of git://git.infradead.org/linux-mtd: (168 commits)
mtd: jz4780_nand: replace if/else blocks with switch/case
mtd: nand: jz4780: Update ecc correction error codes
mtd: nandsim: use nand_get_controller_data()
mtd: jz4780_nand: remove useless mtd->priv = chip assignment
staging: mt29f_spinand: make use of nand_set/get_controller_data() helpers
mtd: nand: make use of nand_set/get_controller_data() helpers
ARM: make use of nand_set/get_controller_data() helpers
mtd: nand: add helpers to access ->priv
mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs
mtd: nand: jz4740: remove custom 'erased check' implementation
mtd: nand: diskonchip: remove custom 'erased check' implementation
mtd: nand: davinci: remove custom 'erased check' implementation
mtd: nand: use nand_check_erased_ecc_chunk in default ECC read functions
mtd: nand: return consistent error codes in ecc.correct() implementations
doc: dt: mtd: new binding for jz4780-{nand,bch}
mtd: cfi_cmdset_0001: fixing memory leak and handling failed kmalloc
mtd: spi-nor: wait until lock/unlock operations are ready
mtd: tests: consolidate kmalloc/memset 0 call to kzalloc
jffs2: use to_delayed_work
mtd: nand: assign reasonable default name for NAND drivers
...
Diffstat (limited to 'drivers/mtd/nand/lpc32xx_mlc.c')
-rw-r--r-- | drivers/mtd/nand/lpc32xx_mlc.c | 40 |
1 files changed, 19 insertions, 21 deletions
diff --git a/drivers/mtd/nand/lpc32xx_mlc.c b/drivers/mtd/nand/lpc32xx_mlc.c index 347510978484..9bc435d72a86 100644 --- a/drivers/mtd/nand/lpc32xx_mlc.c +++ b/drivers/mtd/nand/lpc32xx_mlc.c @@ -173,7 +173,6 @@ struct lpc32xx_nand_host { struct nand_chip nand_chip; struct lpc32xx_mlc_platform_data *pdata; struct clk *clk; - struct mtd_info mtd; void __iomem *io_base; int irq; struct lpc32xx_nand_cfg_mlc *ncfg; @@ -275,8 +274,8 @@ static void lpc32xx_nand_setup(struct lpc32xx_nand_host *host) static void lpc32xx_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) { - struct nand_chip *nand_chip = mtd->priv; - struct lpc32xx_nand_host *host = nand_chip->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); + struct lpc32xx_nand_host *host = nand_get_controller_data(nand_chip); if (cmd != NAND_CMD_NONE) { if (ctrl & NAND_CLE) @@ -291,8 +290,8 @@ static void lpc32xx_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, */ static int lpc32xx_nand_device_ready(struct mtd_info *mtd) { - struct nand_chip *nand_chip = mtd->priv; - struct lpc32xx_nand_host *host = nand_chip->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); + struct lpc32xx_nand_host *host = nand_get_controller_data(nand_chip); if ((readb(MLC_ISR(host->io_base)) & (MLCISR_CONTROLLER_READY | MLCISR_NAND_READY)) == @@ -318,7 +317,7 @@ static irqreturn_t lpc3xxx_nand_irq(int irq, struct lpc32xx_nand_host *host) static int lpc32xx_waitfunc_nand(struct mtd_info *mtd, struct nand_chip *chip) { - struct lpc32xx_nand_host *host = chip->priv; + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); if (readb(MLC_ISR(host->io_base)) & MLCISR_NAND_READY) goto exit; @@ -338,7 +337,7 @@ exit: static int lpc32xx_waitfunc_controller(struct mtd_info *mtd, struct nand_chip *chip) { - struct lpc32xx_nand_host *host = chip->priv; + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); if (readb(MLC_ISR(host->io_base)) & MLCISR_CONTROLLER_READY) goto exit; @@ -389,8 +388,8 @@ static void lpc32xx_dma_complete_func(void *completion) static int lpc32xx_xmit_dma(struct mtd_info *mtd, void *mem, int len, enum dma_transfer_direction dir) { - struct nand_chip *chip = mtd->priv; - struct lpc32xx_nand_host *host = chip->priv; + struct nand_chip *chip = mtd_to_nand(mtd); + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); struct dma_async_tx_descriptor *desc; int flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; int res; @@ -431,7 +430,7 @@ out1: static int lpc32xx_read_page(struct mtd_info *mtd, struct nand_chip *chip, uint8_t *buf, int oob_required, int page) { - struct lpc32xx_nand_host *host = chip->priv; + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); int i, j; uint8_t *oobbuf = chip->oob_poi; uint32_t mlc_isr; @@ -498,7 +497,7 @@ static int lpc32xx_write_page_lowlevel(struct mtd_info *mtd, const uint8_t *buf, int oob_required, int page) { - struct lpc32xx_nand_host *host = chip->priv; + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); const uint8_t *oobbuf = chip->oob_poi; uint8_t *dma_buf = (uint8_t *)buf; int res; @@ -543,7 +542,7 @@ static int lpc32xx_write_page_lowlevel(struct mtd_info *mtd, static int lpc32xx_read_oob(struct mtd_info *mtd, struct nand_chip *chip, int page) { - struct lpc32xx_nand_host *host = chip->priv; + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); /* Read whole page - necessary with MLC controller! */ lpc32xx_read_page(mtd, chip, host->dummy_buf, 1, page); @@ -566,7 +565,7 @@ static void lpc32xx_ecc_enable(struct mtd_info *mtd, int mode) static int lpc32xx_dma_setup(struct lpc32xx_nand_host *host) { - struct mtd_info *mtd = &host->mtd; + struct mtd_info *mtd = nand_to_mtd(&host->nand_chip); dma_cap_mask_t mask; if (!host->pdata || !host->pdata->dma_filter) { @@ -647,7 +646,6 @@ static int lpc32xx_nand_probe(struct platform_device *pdev) struct nand_chip *nand_chip; struct resource *rc; int res; - struct mtd_part_parser_data ppdata = {}; /* Allocate memory for the device structure (and zero it) */ host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL); @@ -661,8 +659,8 @@ static int lpc32xx_nand_probe(struct platform_device *pdev) host->io_base_phy = rc->start; - mtd = &host->mtd; nand_chip = &host->nand_chip; + mtd = nand_to_mtd(nand_chip); if (pdev->dev.of_node) host->ncfg = lpc32xx_parse_dt(&pdev->dev); if (!host->ncfg) { @@ -681,8 +679,9 @@ static int lpc32xx_nand_probe(struct platform_device *pdev) host->pdata = dev_get_platdata(&pdev->dev); - nand_chip->priv = host; /* link the private data structures */ - mtd->priv = nand_chip; + /* link the private data structures */ + nand_set_controller_data(nand_chip, host); + nand_set_flash_node(nand_chip, pdev->dev.of_node); mtd->dev.parent = &pdev->dev; /* Get NAND clock */ @@ -786,9 +785,8 @@ static int lpc32xx_nand_probe(struct platform_device *pdev) mtd->name = DRV_NAME; - ppdata.of_node = pdev->dev.of_node; - res = mtd_device_parse_register(mtd, NULL, &ppdata, host->ncfg->parts, - host->ncfg->num_parts); + res = mtd_device_register(mtd, host->ncfg->parts, + host->ncfg->num_parts); if (!res) return res; @@ -815,7 +813,7 @@ err_exit1: static int lpc32xx_nand_remove(struct platform_device *pdev) { struct lpc32xx_nand_host *host = platform_get_drvdata(pdev); - struct mtd_info *mtd = &host->mtd; + struct mtd_info *mtd = nand_to_mtd(&host->nand_chip); nand_release(mtd); free_irq(host->irq, host); |