diff options
| author | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-23 23:25:53 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-23 23:25:53 +0200 |
| commit | 7abd3ef9875eb2afcdcd4f450680298a2983a55e (patch) | |
| tree | 64c19d2e5ecca182938acfcb8a172efb7d907d85 /drivers/mtd/nand/h1910.c | |
| parent | 3821720d51b5f304d2c33021a82c8da70f6d6ac9 (diff) | |
| download | linux-7abd3ef9875eb2afcdcd4f450680298a2983a55e.tar.bz2 | |
[MTD] Refactor NAND hwcontrol to cmd_ctrl
The hwcontrol function enforced a step by step state machine
for any kind of hardware chip access. Let the hardware driver
know which control bits are set and inform it about a change
of the control lines. Let the hardware driver write out the
command and address bytes directly. This gives a peformance
advantage for address bus controlled chips and simplifies the
quirks in the hardware drivers.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/mtd/nand/h1910.c')
| -rw-r--r-- | drivers/mtd/nand/h1910.c | 40 |
1 files changed, 11 insertions, 29 deletions
diff --git a/drivers/mtd/nand/h1910.c b/drivers/mtd/nand/h1910.c index 06e91fa11b34..2d585d2d090c 100644 --- a/drivers/mtd/nand/h1910.c +++ b/drivers/mtd/nand/h1910.c @@ -56,36 +56,18 @@ static struct mtd_partition partition_info[] = { /* * hardware specific access to control-lines + * + * NAND_NCE: bit 0 - don't care + * NAND_CLE: bit 1 - address bit 2 + * NAND_ALE: bit 2 - address bit 3 */ -static void h1910_hwcontrol(struct mtd_info *mtd, int cmd) +static void h1910_hwcontrol(struct mtd_info *mtd, int cmd, + unsigned int ctrl) { - struct nand_chip *this = (struct nand_chip *)(mtd->priv); - - switch (cmd) { - - case NAND_CTL_SETCLE: - this->IO_ADDR_R |= (1 << 2); - this->IO_ADDR_W |= (1 << 2); - break; - case NAND_CTL_CLRCLE: - this->IO_ADDR_R &= ~(1 << 2); - this->IO_ADDR_W &= ~(1 << 2); - break; - - case NAND_CTL_SETALE: - this->IO_ADDR_R |= (1 << 3); - this->IO_ADDR_W |= (1 << 3); - break; - case NAND_CTL_CLRALE: - this->IO_ADDR_R &= ~(1 << 3); - this->IO_ADDR_W &= ~(1 << 3); - break; - - case NAND_CTL_SETNCE: - break; - case NAND_CTL_CLRNCE: - break; - } + struct nand_chip *chip = mtd->priv; + + if (cmd != NAND_CMD_NONE) + writeb(cmd, chip->IO_ADDR_W | ((ctrl & 0x6) << 1)); } /* @@ -145,7 +127,7 @@ static int __init h1910_init(void) /* insert callbacks */ this->IO_ADDR_R = nandaddr; this->IO_ADDR_W = nandaddr; - this->hwcontrol = h1910_hwcontrol; + this->cmd_ctrl = h1910_hwcontrol; this->dev_ready = NULL; /* unknown whether that was correct or not so we will just do it like this */ /* 15 us command delay time */ this->chip_delay = 50; |