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authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2022-07-12 16:42:42 +0200
committerUlf Hansson <ulf.hansson@linaro.org>2022-07-13 12:37:28 +0200
commit54c16b522e00583ba1151501286b0cf4c91e08c3 (patch)
tree66b6bf0533b3f6e7c611eab927d4475a83c07b52 /drivers/mmc
parent331ad8247b46eeaf3b5c66e5ef5986630fe0f043 (diff)
downloadlinux-54c16b522e00583ba1151501286b0cf4c91e08c3.tar.bz2
dt-bindings: mmc: sdhci-msm: constrain reg-names per variants
The entries in arrays must have fixed order, so the bindings and Linux driver expecting various combinations of 'reg' addresses was never actually conforming to guidelines. The 'core' reg entry is valid only for SDCC v4 and lower, so disallow it in SDCC v5. SDCC v4 supports CQE and ICE, so allow them, even though the qcom,sdhci-msm-v4 compatible is used also for earlier SoCs with SDCC v2 or v3, so it is not entirely accurate. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20220712144245.17417-3-krzysztof.kozlowski@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
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