diff options
| author | Sarthak Garg <sartgarg@codeaurora.org> | 2020-05-22 15:02:28 +0530 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2020-05-28 11:22:16 +0200 |
| commit | 03591160ca192df258890d411f16fe20ec196940 (patch) | |
| tree | 09e6c7e1781fa039099f55d9eeff7c99b6148e90 /drivers/mmc | |
| parent | 1dfbe3ff81f941bb0b39ea6b9f2e8771ef4cb3ea (diff) | |
| download | linux-03591160ca192df258890d411f16fe20ec196940.tar.bz2 | |
mmc: sdhci-msm: Read and use DLL Config property from device tree file
Certain platforms require different settings in the
SDCC_HC_REG_DLL_CONFIG register. This setting can change from platform
to platform. So the driver should check whether a particular platform
require a different setting by reading the DT file and use it.
Also use msm_cm_dll_set_freq only when DLL not supplied.
Signed-off-by: Bao D. Nguyen <nguyenb@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1590139950-7288-7-git-send-email-sartgarg@codeaurora.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/sdhci-msm.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 1e406f500ffc..61cf0f1da85d 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -275,6 +275,7 @@ struct sdhci_msm_host { u32 transfer_mode; bool updated_ddr_cfg; bool uses_tassadar_dll; + u32 dll_config; u32 ddr_config; }; @@ -617,6 +618,9 @@ static int msm_init_cm_dll(struct sdhci_host *host) config &= ~CORE_CLK_PWRSAVE; writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec); + config = msm_host->dll_config; + writel_relaxed(config, host->ioaddr + msm_offset->core_dll_config); + if (msm_host->use_14lpp_dll_reset) { config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config); @@ -642,7 +646,9 @@ static int msm_init_cm_dll(struct sdhci_host *host) config |= CORE_DLL_PDN; writel_relaxed(config, host->ioaddr + msm_offset->core_dll_config); - msm_cm_dll_set_freq(host); + + if (!msm_host->dll_config) + msm_cm_dll_set_freq(host); if (msm_host->use_14lpp_dll_reset && !IS_ERR_OR_NULL(msm_host->xo_clk)) { @@ -682,7 +688,8 @@ static int msm_init_cm_dll(struct sdhci_host *host) msm_offset->core_dll_config); if (msm_host->use_14lpp_dll_reset) { - msm_cm_dll_set_freq(host); + if (!msm_host->dll_config) + msm_cm_dll_set_freq(host); config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config_2); config &= ~CORE_DLL_CLOCK_DISABLE; @@ -1944,6 +1951,8 @@ static inline void sdhci_msm_get_of_property(struct platform_device *pdev, if (of_property_read_u32(node, "qcom,ddr-config", &msm_host->ddr_config)) msm_host->ddr_config = DDR_CONFIG_POR_VAL; + + of_property_read_u32(node, "qcom,dll-config", &msm_host->dll_config); } |