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author | Ludovic Barre <ludovic.barre@st.com> | 2019-03-27 10:05:31 +0100 |
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committer | Ulf Hansson <ulf.hansson@linaro.org> | 2019-04-15 11:55:54 +0200 |
commit | 8372f9d0ef0b9276439f4ff35dc4263bcddf1408 (patch) | |
tree | d0dc6de3460cc9071211771a5630dbda14bd9d3a /drivers/mmc/host/mmci.h | |
parent | 5db1e1fc7cab400e991eed32131cecd03a5e03db (diff) | |
download | linux-8372f9d0ef0b9276439f4ff35dc4263bcddf1408.tar.bz2 |
mmc: mmci: stm32: define get_dctrl_cfg
This patch defines get_dctrl_cfg callback for sdmmc variant.
sdmmc variant has specific stm32 transfer modes.
sdmmc data transfer mode selection could be:
-Block data transfer ending on block count.
-SDIO multibyte data transfer.
-MMC Stream data transfer (not used).
-Block data transfer ending with STOP_TRANSMISSION command.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/mmci.h')
-rw-r--r-- | drivers/mmc/host/mmci.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index 35c91d0059b9..82e9f94e3a16 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -131,6 +131,11 @@ /* Control register extensions in the Qualcomm versions */ #define MCI_DPSM_QCOM_DATA_PEND BIT(17) #define MCI_DPSM_QCOM_RX_DATA_PEND BIT(20) +/* Control register extensions in STM32 versions */ +#define MCI_DPSM_STM32_MODE_BLOCK (0 << 2) +#define MCI_DPSM_STM32_MODE_SDIO (1 << 2) +#define MCI_DPSM_STM32_MODE_STREAM (2 << 2) +#define MCI_DPSM_STM32_MODE_BLOCK_STOP (3 << 2) #define MMCIDATACNT 0x030 #define MMCISTATUS 0x034 |