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author | Patrice Chotard <patrice.chotard@st.com> | 2018-01-18 15:34:17 +0100 |
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committer | Ulf Hansson <ulf.hansson@linaro.org> | 2018-01-18 18:14:45 +0100 |
commit | 6ea9cdf3912a8ca532dde5296a0e81fc75a40fa3 (patch) | |
tree | ca30c33b3b63b05cd38fe3de2edd85d70a485e64 /drivers/mmc/host/mmci.h | |
parent | 1910b87f7a9e6d9f9085d36e45dce1e5547c692d (diff) | |
download | linux-6ea9cdf3912a8ca532dde5296a0e81fc75a40fa3.tar.bz2 |
mmc: mmci: Don't pretend all variants to have MMCIMASK1 register
Two mask registers are used in order to select which events have to
actually generate an interrupt on each IRQ line.
It seems that in the single-IRQ case it's assumed that the IRQs lines
are simply OR-ed, while the two mask registers are still present. The
driver still programs the two mask registers separately.
However the STM32 variant has only one IRQ, and also has only one mask
register.
This patch prepares for STM32 variant support by making the driver using
only one mask register.
This patch also optimize the MMCIMASK1 mask usage by caching it into
host->mask1_reg which avoid to read it into mmci_irq().
Tested only on STM32 variant. RFT for variants other than STM32
Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/mmci.h')
-rw-r--r-- | drivers/mmc/host/mmci.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index 4a8bef1aac8f..83160a9c4c77 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -223,6 +223,7 @@ struct mmci_host { u32 clk_reg; u32 datactrl_reg; u32 busy_status; + u32 mask1_reg; bool vqmmc_enabled; struct mmci_platform_data *plat; struct variant_data *variant; |