Merge tag 'mmc-v3.17-1' of git://git.linaro.org/people/ulf.hansson/mmc

Pull MMC updates from Ulf Hansson:
 "Me and Chris Ball decided to try out using my MMC tree as the primary
  one, to simplify handling of patches.

  This pull does thus contains all the MMC patches for 3.17 rc1, no pull
  from Chris this time.

  Details:

  MMC core:
   - forward compatibility for eMMC
   - fix some blacklisted cards with broken secure discard

  MMC host:
   - mmci: Add support for Qualcomm variant
   - mmci: Fix regression for arm_variant
   - sdhci: Various fixes and cleanups
   - sdhci: Improve external VDD regulator support
   - sdhci: Support for DDR50 1.8V mode for BayTrail
   - sdhci-st: Add driver for ST SDHCI controller
   - sh-mmcif: DMA fixes
   - omap_hsmmc: Add support for SDIO interrupts
   - sdhci-pci: Add support for Intel Quark X1000
   - dw_mmc: Update the reset sequence
   - s3cmci: port DMA code to dmaengine API"

* tag 'mmc-v3.17-1' of git://git.linaro.org/people/ulf.hansson/mmc: (67 commits)
  mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed
  mmc: dw_mmc: Slot quirk "disable-wp" is deprecated.
  mmc: mmci: Reverse IRQ handling for the arm_variant
  mmc: mmci: Move all CMD irq handling to mmci_cmd_irq()
  mmc: mmci: Remove redundant check of status for DATA irq
  mmc: dw_mmc: change to use recommended reset procedure
  mmc: sdhci-pxav3: Use devm_* managed helpers
  mmc: tmio: Configure DMA slave bus width
  mmc: sh_mmcif: Configure DMA slave bus width
  mmc: sh_mmcif: Fix DMA slave address configuration
  mmc: sh_mmcif: Document DT bindings
  mmc: sdhci-pci: remove PCI PM functions in suspend/resume callback
  mmc: Do not advertise secure discard if it is blacklisted
  mmc: sdhci-msm: Get COMPILE_TEST support
  mmc: sdhci-msm: Remove unnecessary header file inclusion
  mmc: sdhci-msm: Fix the binding example
  mmc: sdhci: add DDR50 1.8V mode support for BayTrail eMMC Controller
  mmc: sdhci: Preset value not supported in Baytrail eMMC
  mmc: MMC_USDHI6ROL0 should depend on HAS_DMA
  mmc: MMC_SH_MMCIF should depend on HAS_DMA
  ...

1 files changed, 20 insertions, 0 deletions

diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h
index 347d942d740b..a1f5e4f49e2a 100644
--- a/drivers/mmc/host/mmci.h
+++ b/drivers/mmc/host/mmci.h
@@ -41,6 +41,15 @@
 /* Modified PL180 on Versatile Express platform */
 #define MCI_ARM_HWFCEN		(1 << 12)
 
+/* Modified on Qualcomm Integrations */
+#define MCI_QCOM_CLK_WIDEBUS_8	(BIT(10) | BIT(11))
+#define MCI_QCOM_CLK_FLOWENA	BIT(12)
+#define MCI_QCOM_CLK_INVERTOUT	BIT(13)
+
+/* select in latch data and command in */
+#define MCI_QCOM_CLK_SELECT_IN_FBCLK	BIT(15)
+#define MCI_QCOM_CLK_SELECT_IN_DDR_MODE	(BIT(14) | BIT(15))
+
 #define MMCIARGUMENT		0x008
 #define MMCICOMMAND		0x00c
 #define MCI_CPSM_RESPONSE	(1 << 6)
@@ -54,6 +63,14 @@
 #define MCI_ST_NIEN		(1 << 13)
 #define MCI_ST_CE_ATACMD	(1 << 14)
 
+/* Modified on Qualcomm Integrations */
+#define MCI_QCOM_CSPM_DATCMD		BIT(12)
+#define MCI_QCOM_CSPM_MCIABORT		BIT(13)
+#define MCI_QCOM_CSPM_CCSENABLE		BIT(14)
+#define MCI_QCOM_CSPM_CCSDISABLE	BIT(15)
+#define MCI_QCOM_CSPM_AUTO_CMD19	BIT(16)
+#define MCI_QCOM_CSPM_AUTO_CMD21	BIT(21)
+
 #define MMCIRESPCMD		0x010
 #define MMCIRESPONSE0		0x014
 #define MMCIRESPONSE1		0x018
@@ -191,6 +208,8 @@ struct mmci_host {
 	spinlock_t		lock;
 
 	unsigned int		mclk;
+	/* cached value of requested clk in set_ios */
+	unsigned int		clock_cache;
 	unsigned int		cclk;
 	u32			pwr_reg;
 	u32			pwr_reg_add;
@@ -210,6 +229,7 @@ struct mmci_host {
 	/* pio stuff */
 	struct sg_mapping_iter	sg_miter;
 	unsigned int		size;
+	int (*get_rx_fifocnt)(struct mmci_host *h, u32 status, int remain);
 
 #ifdef CONFIG_DMA_ENGINE
 	/* DMA stuff */