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| author | Furquan Shaikh <furquan@google.com> | 2017-07-23 23:02:19 -0700 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2017-09-05 08:46:01 +0100 |
| commit | 0b471aaa0e1a8f3d06c76b52c3a903f817d7052e (patch) | |
| tree | d8457c7e9c8d1c701c1b55095614d32367755be6 /drivers/mfd | |
| parent | 6af42e5dd008535b9c1a7d2538ab19617538c3eb (diff) | |
| download | linux-0b471aaa0e1a8f3d06c76b52c3a903f817d7052e.tar.bz2 | |
mfd: intel-lpss: Put I2C and SPI controllers into reset state on suspend
Commit 274e43edcda6f ("mfd: intel-lpss: Do not put device in reset
state on suspend") changed the behavior on suspend by not putting LPSS
controllers into reset. This was done because S3/S0ix fail if UART
device is put into reset and no_console_suspend flag is enabled.
Because of the above change, I2C controller gets into a bad state if
it observes that the I2C lines are pulled low when power to I2C device
is cut off during suspend (generally, I2C lines are pulled to power
rail of the I2C device in order to ensure that there is no leakage
because of the pulls when device is turned off). This results in the
controller timing out for all future I2C operations after resume. It
is primarily because of the following sequence of operations:
During suspend:
1. I2C controller is disabled, but it is not put into reset.
2. Power to I2C device is cut off.
3. #2 results in the I2C lines being pulled low.
==> At this point the I2C controller gets into a bad state
On resume:
1. Power to I2C device is enabled.
2. #2 results in the I2C lines being pulled high.
3. I2C controller is enabled.
However, even after enabling the I2C controller, all future I2C xfers
fail since the controller is in a bad state and does not attempt to
make any transactions and hence times out.
In order to ensure that the controller does not get into a bad state,
this change puts it into reset if the controller type is not
UART. With this change, the order of operations is:
During suspend:
1. I2C controller is disabled and put into reset.
2. Power to I2C device is cut off.
3. #2 results in the I2C lines being pulled low.
On resume:
1. Power to I2C device is enabled.
2. #2 results in the I2C lines being pulled high.
3. I2C controller is enabled and taken out of reset.
Signed-off-by: Furquan Shaikh <furquan@google.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers/mfd')
| -rw-r--r-- | drivers/mfd/intel-lpss.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/mfd/intel-lpss.c b/drivers/mfd/intel-lpss.c index 70c646b0097d..0e0ab9bb1530 100644 --- a/drivers/mfd/intel-lpss.c +++ b/drivers/mfd/intel-lpss.c @@ -502,6 +502,14 @@ int intel_lpss_suspend(struct device *dev) for (i = 0; i < LPSS_PRIV_REG_COUNT; i++) lpss->priv_ctx[i] = readl(lpss->priv + i * 4); + /* + * If the device type is not UART, then put the controller into + * reset. UART cannot be put into reset since S3/S0ix fail when + * no_console_suspend flag is enabled. + */ + if (lpss->type != LPSS_DEV_UART) + writel(0, lpss->priv + LPSS_PRIV_RESETS); + return 0; } EXPORT_SYMBOL_GPL(intel_lpss_suspend); |