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authorKuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>2017-06-05 12:08:02 -0700
committerLee Jones <lee.jones@linaro.org>2017-06-19 15:44:29 +0100
commitc4949630fe437bc15346abbd1a92dee8e80a85d4 (patch)
tree6460830ad2f82fa91074e45b7eb52e4e40f4b592 /drivers/mfd
parent4533d8551b7dc594f5d203c1dc6c1527a21ad61d (diff)
downloadlinux-c4949630fe437bc15346abbd1a92dee8e80a85d4.tar.bz2
mfd: intel_soc_pmic_bxtwc: Remove thermal second level IRQs
Since all second level thermal IRQs are consumed by the same device(bxt_wcove_thermal), there is no need to expose them as separate interrupts. We can just export only the first level IRQs for thermal and let the device(bxt_wcove_thermal) driver handle the second level IRQs based on thermal interrupt status register. Also, just using only the first level IRQ will eliminate the bug involved in requesting only the second level IRQ and not explicitly enable the first level IRQ. For more info on this issue please read the details at, https://lkml.org/lkml/2017/2/27/148 This patch also makes relevant change in bxt_wcove_thermal driver to use only first level PMIC thermal IRQ. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Acked-by: Zhang Rui <rui.zhang@intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers/mfd')
-rw-r--r--drivers/mfd/intel_soc_pmic_bxtwc.c32
1 files changed, 12 insertions, 20 deletions
diff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c b/drivers/mfd/intel_soc_pmic_bxtwc.c
index 7cbaf1eda3f8..7c1ed27c7720 100644
--- a/drivers/mfd/intel_soc_pmic_bxtwc.c
+++ b/drivers/mfd/intel_soc_pmic_bxtwc.c
@@ -84,10 +84,7 @@ enum bxtwc_irqs {
enum bxtwc_irqs_level2 {
/* Level 2 */
- BXTWC_THRM0_IRQ = 0,
- BXTWC_THRM1_IRQ,
- BXTWC_THRM2_IRQ,
- BXTWC_BCU_IRQ,
+ BXTWC_BCU_IRQ = 0,
BXTWC_ADC_IRQ,
BXTWC_USBC_IRQ,
BXTWC_CHGR0_IRQ,
@@ -114,17 +111,14 @@ static const struct regmap_irq bxtwc_regmap_irqs[] = {
};
static const struct regmap_irq bxtwc_regmap_irqs_level2[] = {
- REGMAP_IRQ_REG(BXTWC_THRM0_IRQ, 0, 0xff),
- REGMAP_IRQ_REG(BXTWC_THRM1_IRQ, 1, 0xbf),
- REGMAP_IRQ_REG(BXTWC_THRM2_IRQ, 2, 0xff),
- REGMAP_IRQ_REG(BXTWC_BCU_IRQ, 3, 0x1f),
- REGMAP_IRQ_REG(BXTWC_ADC_IRQ, 4, 0xff),
- REGMAP_IRQ_REG(BXTWC_USBC_IRQ, 5, BIT(5)),
- REGMAP_IRQ_REG(BXTWC_CHGR0_IRQ, 5, 0x1f),
- REGMAP_IRQ_REG(BXTWC_CHGR1_IRQ, 6, 0x1f),
- REGMAP_IRQ_REG(BXTWC_GPIO0_IRQ, 7, 0xff),
- REGMAP_IRQ_REG(BXTWC_GPIO1_IRQ, 8, 0x3f),
- REGMAP_IRQ_REG(BXTWC_CRIT_IRQ, 9, 0x03),
+ REGMAP_IRQ_REG(BXTWC_BCU_IRQ, 0, 0x1f),
+ REGMAP_IRQ_REG(BXTWC_ADC_IRQ, 1, 0xff),
+ REGMAP_IRQ_REG(BXTWC_USBC_IRQ, 2, BIT(5)),
+ REGMAP_IRQ_REG(BXTWC_CHGR0_IRQ, 2, 0x1f),
+ REGMAP_IRQ_REG(BXTWC_CHGR1_IRQ, 3, 0x1f),
+ REGMAP_IRQ_REG(BXTWC_GPIO0_IRQ, 4, 0xff),
+ REGMAP_IRQ_REG(BXTWC_GPIO1_IRQ, 5, 0x3f),
+ REGMAP_IRQ_REG(BXTWC_CRIT_IRQ, 6, 0x03),
};
static const struct regmap_irq bxtwc_regmap_irqs_tmu[] = {
@@ -142,8 +136,8 @@ static struct regmap_irq_chip bxtwc_regmap_irq_chip = {
static struct regmap_irq_chip bxtwc_regmap_irq_chip_level2 = {
.name = "bxtwc_irq_chip_level2",
- .status_base = BXTWC_THRM0IRQ,
- .mask_base = BXTWC_MTHRM0IRQ,
+ .status_base = BXTWC_BCUIRQ,
+ .mask_base = BXTWC_MBCUIRQ,
.irqs = bxtwc_regmap_irqs_level2,
.num_irqs = ARRAY_SIZE(bxtwc_regmap_irqs_level2),
.num_regs = 10,
@@ -177,9 +171,7 @@ static struct resource charger_resources[] = {
};
static struct resource thermal_resources[] = {
- DEFINE_RES_IRQ(BXTWC_THRM0_IRQ),
- DEFINE_RES_IRQ(BXTWC_THRM1_IRQ),
- DEFINE_RES_IRQ(BXTWC_THRM2_IRQ),
+ DEFINE_RES_IRQ(BXTWC_THRM_LVL1_IRQ),
};
static struct resource bcu_resources[] = {