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| author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2013-06-05 16:51:25 +0300 |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2013-06-11 17:38:39 -0700 |
| commit | aa6fefde62401a84154161a8026872874a70e4c1 (patch) | |
| tree | b1787ce0bfe3258b9584f04a9ed49f30bfa6e66b /drivers/mfd/ab8500-gpadc.c | |
| parent | c388eee21ad20929f440d6fae94c995791c5818b (diff) | |
| download | linux-aa6fefde62401a84154161a8026872874a70e4c1.tar.bz2 | |
clk: tegra: allow PLL m,n,p init from SoC files
The m,n,p fields don't have the same bit offset and width across all PLLs.
This patch allows SoC specific files to indicate the offset and width.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/mfd/ab8500-gpadc.c')
0 files changed, 0 insertions, 0 deletions