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authorArnd Bergmann <arnd@arndb.de>2017-11-02 16:21:03 +0100
committerArnd Bergmann <arnd@arndb.de>2017-11-02 16:21:03 +0100
commit3330becb479fd26cfeeea1e06f8999c3b10806cc (patch)
tree2e7fb10017094af8374e848fb7dde2fcc9a9a865 /drivers/memory
parent78af0be67b297c3c4207b034e24c94e14c66b20c (diff)
parent04c3767f10809797331cda78808d9163939081e1 (diff)
downloadlinux-3330becb479fd26cfeeea1e06f8999c3b10806cc.tar.bz2
Merge tag 'arm-soc/for-4.15/drivers-part2' of http://github.com/Broadcom/stblinux into next/drivers
Pull "Broadcom drivers changes for 4.15 (part 2)" from Florian Fainelli: This pull request contains Broadcom ARM/ARM64/MIPS SoCs changes for 4.15 (second part), please pull the following: - Markus updates the Broadcom STB DPFE driver to avoid loading the firmware when unnecessary to accomodate for specific platform restrictions - Florian adds support for the Broadcom Hurricane 2 SoC iProc PLL clock needed to get the proper CPU clock frequency * tag 'arm-soc/for-4.15/drivers-part2' of http://github.com/Broadcom/stblinux: clk: bcm: Add Broadcom Hurricane 2 clock support memory: brcmstb: dpfe: skip downloading firmware when possible memory: brcmstb: dpfe: introduce is_dcpu_enabled()
Diffstat (limited to 'drivers/memory')
-rw-r--r--drivers/memory/brcmstb_dpfe.c37
1 files changed, 29 insertions, 8 deletions
diff --git a/drivers/memory/brcmstb_dpfe.c b/drivers/memory/brcmstb_dpfe.c
index 21242c401af5..0a7bdbed3a6f 100644
--- a/drivers/memory/brcmstb_dpfe.c
+++ b/drivers/memory/brcmstb_dpfe.c
@@ -202,17 +202,26 @@ static const u32 dpfe_commands[DPFE_CMD_MAX][MSG_FIELD_MAX] = {
},
};
+static bool is_dcpu_enabled(void __iomem *regs)
+{
+ u32 val;
+
+ val = readl_relaxed(regs + REG_DCPU_RESET);
+
+ return !(val & DCPU_RESET_MASK);
+}
+
static void __disable_dcpu(void __iomem *regs)
{
u32 val;
- /* Check if DCPU is running */
+ if (!is_dcpu_enabled(regs))
+ return;
+
+ /* Put DCPU in reset if it's running. */
val = readl_relaxed(regs + REG_DCPU_RESET);
- if (!(val & DCPU_RESET_MASK)) {
- /* Put DCPU in reset */
- val |= (1 << DCPU_RESET_SHIFT);
- writel_relaxed(val, regs + REG_DCPU_RESET);
- }
+ val |= (1 << DCPU_RESET_SHIFT);
+ writel_relaxed(val, regs + REG_DCPU_RESET);
}
static void __enable_dcpu(void __iomem *regs)
@@ -422,13 +431,25 @@ static int brcmstb_dpfe_download_firmware(struct platform_device *pdev,
const void *fw_blob;
int ret;
+ priv = platform_get_drvdata(pdev);
+
+ /*
+ * Skip downloading the firmware if the DCPU is already running and
+ * responding to commands.
+ */
+ if (is_dcpu_enabled(priv->regs)) {
+ u32 response[MSG_FIELD_MAX];
+
+ ret = __send_command(priv, DPFE_CMD_GET_INFO, response);
+ if (!ret)
+ return 0;
+ }
+
ret = request_firmware(&fw, FIRMWARE_NAME, dev);
/* request_firmware() prints its own error messages. */
if (ret)
return ret;
- priv = platform_get_drvdata(pdev);
-
ret = __verify_firmware(init, fw);
if (ret)
return -EFAULT;