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author | Pavel Fedin <p.fedin@samsung.com> | 2015-09-13 12:14:33 +0100 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2015-09-15 17:06:29 +0200 |
commit | 157add60cb35913b8a848a3d7e6456b8ed134796 (patch) | |
tree | 819464c7e43d39e00c6a778d579468eb9c96897b /drivers/irqchip/irq-renesas-irqc.c | |
parent | 5a9a8915c8888b615521b17d70a4342187eae60b (diff) | |
download | linux-157add60cb35913b8a848a3d7e6456b8ed134796.tar.bz2 |
irqchip/GICv2m: Fix GICv2m build warning on 32 bits
After GICv2m was enabled for 32-bit ARM kernel, a warning popped up:
drivers/irqchip/irq-gic-v2m.c: In function gicv2m_compose_msi_msg:
drivers/irqchip/irq-gic-v2m.c:100:2: warning: right shift count >= width
of type [enabled by default]
msg->address_hi = (u32) (addr >> 32);
^
This patch fixes it by using proper macros for splitting up the value.
Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Stuart Yoder <stuart.yoder@freescale.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1442142873-20213-4-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/irqchip/irq-renesas-irqc.c')
0 files changed, 0 insertions, 0 deletions