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author | Paul Burton <paul.burton@imgtec.com> | 2017-08-12 19:49:26 -0700 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2017-08-29 15:21:57 +0200 |
commit | b025d51873d5fe6f05f8e94174282cb00ef1f489 (patch) | |
tree | 587c788a0cd326534ba5c524cb8a31cf288e32d3 /drivers/irqchip/irq-mips-gic.c | |
parent | abe852ea3ad1c9ada6d053ae8f9eedb9722d0e90 (diff) | |
download | linux-b025d51873d5fe6f05f8e94174282cb00ef1f489.tar.bz2 |
MIPS: CM: Specify register size when generating accessors
Some CM registers are always 32 bits, or at least only use bits in the
lower 32 bits of the register. For these registers it is wasteful for us
to generate accessors which bother to check mips_cm_is64 & perform 64
bit accesses.
This patch modifies the accessor generation to take into account the
size of the register, and for 32 bit registers we generate accessors
which only ever perform 32 bit accesses. For 64 bit registers we either
perform a 64 bit access or two 32 bit accesses, depending upon the value
of mips_cm_is64. Doing this saves us ~1.5KiB of code in a generic 64r6el
kernel, and perhaps more importantly simplifies various code paths.
This removes the read64_gcr_* accessors, so mips_cm_error_report() is
modified to stop using them & instead use the regular read_gcr_*
accessors which will return 64 bit values from the 64 bit registers.
The new accessor macros are placed in asm/mips-cps.h such that they can
be shared by CPC & GIC code in later patches.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17000/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'drivers/irqchip/irq-mips-gic.c')
0 files changed, 0 insertions, 0 deletions