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authorJoerg Roedel <joerg.roedel@amd.com>2012-04-12 12:49:26 +0200
committerJoerg Roedel <joerg.roedel@amd.com>2012-04-12 12:49:26 +0200
commita3b93121430c7b46c2895a7744261be107ccdf7f (patch)
treefcd1609527275d098e69a79ceedf22094cff5de1 /drivers/iommu
parent0034102808e0dbbf3a2394b82b1bb40b5778de9e (diff)
downloadlinux-a3b93121430c7b46c2895a7744261be107ccdf7f.tar.bz2
iommu/amd: Check for the right TLP prefix bit
Unfortunatly the PRI spec changed and moved the TLP-prefix-required bit to a different location. This patch makes the necessary change in the AMD IOMMU driver. Regressions are not expected because all hardware implementing the PRI capability sets this bit to zero anyway. Cc: stable@vger.kernel.org # v3.3 Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'drivers/iommu')
-rw-r--r--drivers/iommu/amd_iommu.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index a5bee8e2dfce..08f3eecb87a2 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -2035,20 +2035,20 @@ out_err:
}
/* FIXME: Move this to PCI code */
-#define PCI_PRI_TLP_OFF (1 << 2)
+#define PCI_PRI_TLP_OFF (1 << 15)
bool pci_pri_tlp_required(struct pci_dev *pdev)
{
- u16 control;
+ u16 status;
int pos;
pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
if (!pos)
return false;
- pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
+ pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
- return (control & PCI_PRI_TLP_OFF) ? true : false;
+ return (status & PCI_PRI_TLP_OFF) ? true : false;
}
/*