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authorJason Gunthorpe <jgg@nvidia.com>2020-09-17 15:12:22 -0300
committerJason Gunthorpe <jgg@nvidia.com>2020-09-18 10:31:45 -0300
commit5dee5872f87552cfb173c899d35fc1413c2aa77f (patch)
tree273a8551247785dbec22d1e7c55e2b636e1c9e8e /drivers/iommu/intel/irq_remapping.c
parentc0a6b5ecc5b7dd028c2921415ea036074a8f8b00 (diff)
parent376ceb31ff879c2ee6b48eef841d6fa7720f6f43 (diff)
downloadlinux-5dee5872f87552cfb173c899d35fc1413c2aa77f.tar.bz2
Merge branch 'mlx5_active_speed' into rdma.git for-next
Leon Romanovsky says: ==================== IBTA declares speed as 16 bits, but kernel stores it in u8. This series fixes in-kernel declaration while keeping external interface intact. ==================== Based on the mlx5-next branch at git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux due to dependencies. * branch 'mlx5_active_speed': RDMA: Fix link active_speed size RDMA/mlx5: Delete duplicated mlx5_ptys_width enum net/mlx5: Refactor query port speed functions
Diffstat (limited to 'drivers/iommu/intel/irq_remapping.c')
-rw-r--r--drivers/iommu/intel/irq_remapping.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/iommu/intel/irq_remapping.c b/drivers/iommu/intel/irq_remapping.c
index 23583b0e66a5..8f4ce72570ce 100644
--- a/drivers/iommu/intel/irq_remapping.c
+++ b/drivers/iommu/intel/irq_remapping.c
@@ -508,12 +508,18 @@ static void iommu_enable_irq_remapping(struct intel_iommu *iommu)
/* Enable interrupt-remapping */
iommu->gcmd |= DMA_GCMD_IRE;
- iommu->gcmd &= ~DMA_GCMD_CFI; /* Block compatibility-format MSIs */
writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
-
IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
readl, (sts & DMA_GSTS_IRES), sts);
+ /* Block compatibility-format MSIs */
+ if (sts & DMA_GSTS_CFIS) {
+ iommu->gcmd &= ~DMA_GCMD_CFI;
+ writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
+ IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
+ readl, !(sts & DMA_GSTS_CFIS), sts);
+ }
+
/*
* With CFI clear in the Global Command register, we should be
* protected from dangerous (i.e. compatibility) interrupts