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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2020-05-19 15:50:43 +0300 |
|---|---|---|
| committer | Wolfram Sang <wsa@kernel.org> | 2020-05-22 16:50:43 +0200 |
| commit | 3f35064a7cfef4ed8d25cdb16da0abfbbd525f63 (patch) | |
| tree | ef36a39ee37d87086f701b0564d7da20916f05ac /drivers/i2c | |
| parent | 64d0a0755c7deeb600d8ee287cfb84469aa37ac8 (diff) | |
| download | linux-3f35064a7cfef4ed8d25cdb16da0abfbbd525f63.tar.bz2 | |
i2c: designware: Drop hard coded FIFO depth assignment
It's not clear why the commit fe20ff5c7e9c
("i2c-designware: Add support for Designware core behind PCI devices.")
followed by commit b61b14154b19
("i2c-designware: add support for Intel Lynxpoint")
chose to hard code FIFO depth size. The FIFO depth on all hardware,
I have tested on, can be nicely detected automatically.
Thus, we may safely drop hard coded FIFO sizes from the driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Diffstat (limited to 'drivers/i2c')
| -rw-r--r-- | drivers/i2c/busses/i2c-designware-common.c | 3 | ||||
| -rw-r--r-- | drivers/i2c/busses/i2c-designware-pcidrv.c | 17 |
2 files changed, 0 insertions, 20 deletions
diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busses/i2c-designware-common.c index e1697ed8b54a..ed302342f8db 100644 --- a/drivers/i2c/busses/i2c-designware-common.c +++ b/drivers/i2c/busses/i2c-designware-common.c @@ -200,9 +200,6 @@ int i2c_dw_acpi_configure(struct device *device) struct i2c_timings *t = &dev->timings; u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0; - dev->tx_fifo_depth = 32; - dev->rx_fifo_depth = 32; - /* * Try to get SDA hold time and *CNT values from an ACPI method for * selected speed modes. diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index 3664d76bb976..11a5e4751eab 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -46,8 +46,6 @@ struct dw_scl_sda_cfg { struct dw_pci_controller { u32 bus_num; - u32 tx_fifo_depth; - u32 rx_fifo_depth; u32 flags; struct dw_scl_sda_cfg *scl_sda_cfg; int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c); @@ -133,41 +131,29 @@ static u32 ehl_get_clk_rate_khz(struct dw_i2c_dev *dev) static struct dw_pci_controller dw_pci_controllers[] = { [medfield] = { .bus_num = -1, - .tx_fifo_depth = 32, - .rx_fifo_depth = 32, .setup = mfld_setup, .get_clk_rate_khz = mfld_get_clk_rate_khz, }, [merrifield] = { .bus_num = -1, - .tx_fifo_depth = 64, - .rx_fifo_depth = 64, .scl_sda_cfg = &mrfld_config, .setup = mrfld_setup, }, [baytrail] = { .bus_num = -1, - .tx_fifo_depth = 32, - .rx_fifo_depth = 32, .scl_sda_cfg = &byt_config, }, [haswell] = { .bus_num = -1, - .tx_fifo_depth = 32, - .rx_fifo_depth = 32, .scl_sda_cfg = &hsw_config, }, [cherrytrail] = { .bus_num = -1, - .tx_fifo_depth = 32, - .rx_fifo_depth = 32, .flags = MODEL_CHERRYTRAIL, .scl_sda_cfg = &byt_config, }, [elkhartlake] = { .bus_num = -1, - .tx_fifo_depth = 32, - .rx_fifo_depth = 32, .get_clk_rate_khz = ehl_get_clk_rate_khz, }, }; @@ -277,9 +263,6 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev, dev->sda_hold_time = cfg->sda_hold; } - dev->tx_fifo_depth = controller->tx_fifo_depth; - dev->rx_fifo_depth = controller->rx_fifo_depth; - adap = &dev->adapter; adap->owner = THIS_MODULE; adap->class = 0; |