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| author | David S. Miller <davem@davemloft.net> | 2018-02-19 18:46:11 -0500 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2018-02-19 18:46:11 -0500 |
| commit | f5c0c6f4299f870f074235fbf552ecf957fc249c (patch) | |
| tree | 6b46b9c0b271185b6f98fab350c3891042e729b1 /drivers/hwmon/coretemp.c | |
| parent | 26736a08ee0fb89a4f09bfb2c9f0805028ff63aa (diff) | |
| parent | 79c0ef3e85c015b0921a8fd5dd539d1480e9cd6c (diff) | |
| download | linux-f5c0c6f4299f870f074235fbf552ecf957fc249c.tar.bz2 | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Diffstat (limited to 'drivers/hwmon/coretemp.c')
| -rw-r--r-- | drivers/hwmon/coretemp.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c index 4bdbf77f7197..72c338eb5fae 100644 --- a/drivers/hwmon/coretemp.c +++ b/drivers/hwmon/coretemp.c @@ -269,13 +269,13 @@ static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) { const struct tjmax_model *tm = &tjmax_model_table[i]; if (c->x86_model == tm->model && - (tm->mask == ANY || c->x86_mask == tm->mask)) + (tm->mask == ANY || c->x86_stepping == tm->mask)) return tm->tjmax; } /* Early chips have no MSR for TjMax */ - if (c->x86_model == 0xf && c->x86_mask < 4) + if (c->x86_model == 0xf && c->x86_stepping < 4) usemsr_ee = 0; if (c->x86_model > 0xe && usemsr_ee) { @@ -426,7 +426,7 @@ static int chk_ucode_version(unsigned int cpu) * Readings might stop update when processor visited too deep sleep, * fixed for stepping D0 (6EC). */ - if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) { + if (c->x86_model == 0xe && c->x86_stepping < 0xc && c->microcode < 0x39) { pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n"); return -ENODEV; } |