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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2019-03-06 22:48:35 +0200
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2019-03-28 06:12:42 +0200
commit00d082cc4ea6e42ec4fed832a1020231bb1ca150 (patch)
tree6b2257d90fee778e56f93003a7fab563d4536fec /drivers/gpu
parent871370308675e477abd57a69ce66ca4730a4249c (diff)
downloadlinux-00d082cc4ea6e42ec4fed832a1020231bb1ca150.tar.bz2
drm: rcar-du: lvds: Set LVEN and LVRES bits together on D3
On the D3 SoC the LVDS PHY must be enabled in the same register write that enables the LVDS output. Skip writing the LVEN bit independently on that platform, it will be set by the write that sets LVRES. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/rcar-du/rcar_lvds.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/gpu/drm/rcar-du/rcar_lvds.c b/drivers/gpu/drm/rcar-du/rcar_lvds.c
index 9d8058d5c20a..620b51aab291 100644
--- a/drivers/gpu/drm/rcar-du/rcar_lvds.c
+++ b/drivers/gpu/drm/rcar-du/rcar_lvds.c
@@ -485,9 +485,13 @@ static void rcar_lvds_enable(struct drm_bridge *bridge)
}
if (lvds->info->quirks & RCAR_LVDS_QUIRK_GEN3_LVEN) {
- /* Turn on the LVDS PHY. */
+ /*
+ * Turn on the LVDS PHY. On D3, the LVEN and LVRES bit must be
+ * set at the same time, so don't write the register yet.
+ */
lvdcr0 |= LVDCR0_LVEN;
- rcar_lvds_write(lvds, LVDCR0, lvdcr0);
+ if (!(lvds->info->quirks & RCAR_LVDS_QUIRK_PWD))
+ rcar_lvds_write(lvds, LVDCR0, lvdcr0);
}
if (!(lvds->info->quirks & RCAR_LVDS_QUIRK_EXT_PLL)) {