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authorMarek Szyprowski <m.szyprowski@samsung.com>2015-12-16 13:21:48 +0100
committerInki Dae <daeinki@gmail.com>2016-01-13 00:16:36 +0900
commit5e68fef24fab07f4decc78d421838eb73b7e3931 (patch)
treec716b652a73908ec00dc84bcc1244ec5ade0d4a6 /drivers/gpu
parent26a7af3ed8a59c27ce125e7619272ca45630d000 (diff)
downloadlinux-5e68fef24fab07f4decc78d421838eb73b7e3931.tar.bz2
drm/exynos: mixer: unify a check for video-processor window
Always use macro instead of hard-coded '2' value in conditions related to video processor window. Additional checks are not needed, because video layer is registered only when video processor is available. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/exynos/exynos_mixer.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index 31a9a228744e..bf148dc3623c 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -438,7 +438,7 @@ static void mixer_cfg_layer(struct mixer_context *ctx, unsigned int win,
MXR_LAYER_CFG_GRP1_VAL(priority),
MXR_LAYER_CFG_GRP1_MASK);
break;
- case 2:
+ case VP_DEFAULT_WIN:
if (ctx->vp_enabled) {
vp_reg_writemask(res, VP_ENABLE, val, VP_ENABLE_ON);
mixer_reg_writemask(res, MXR_CFG, val,
@@ -990,7 +990,7 @@ static void mixer_update_plane(struct exynos_drm_crtc *crtc,
if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags))
return;
- if (plane->index > 1 && mixer_ctx->vp_enabled)
+ if (plane->index == VP_DEFAULT_WIN)
vp_video_buffer(mixer_ctx, plane);
else
mixer_graph_buffer(mixer_ctx, plane);