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author | Imre Deak <imre.deak@intel.com> | 2014-12-19 19:33:25 +0200 |
---|---|---|
committer | Jani Nikula <jani.nikula@intel.com> | 2015-01-12 10:52:41 +0200 |
commit | 63a3451641ec2e129dfe80044e3c96bc9f0bb690 (patch) | |
tree | f443ac87033f89e401e25d23c3aa688b9ff79d71 /drivers/gpu/drm | |
parent | eaa27f34e91a14cdceed26ed6c6793ec1d186115 (diff) | |
download | linux-63a3451641ec2e129dfe80044e3c96bc9f0bb690.tar.bz2 |
drm/i915: gen9: fix RPS interrupt routing to CPU vs. GT
GEN8+ HW has the option to route PM interrupts to either the CPU or to
GT. For GEN8 this was already set correctly to routing to CPU, but not
for GEN9, so fix this. Note that when disabling RPS interrupts this was
set already correctly, though in that case it didn't matter much except
for the possibility of spurious interrupts.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 964b28e3c630..78e308bebac9 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4369,7 +4369,7 @@ static u32 gen6_rps_pm_mask(struct drm_i915_private *dev_priv, u8 val) if (INTEL_INFO(dev_priv->dev)->gen <= 7 && !IS_HASWELL(dev_priv->dev)) mask |= GEN6_PM_RP_UP_EI_EXPIRED; - if (IS_GEN8(dev_priv->dev)) + if (INTEL_INFO(dev_priv)->gen >= 8) mask |= GEN8_PMINTR_REDIRECT_TO_NON_DISP; return ~mask; |