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| author | Akash Goel <akash.goel@intel.com> | 2015-06-29 14:50:21 +0530 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-07-14 11:35:47 +0200 |
| commit | cc017fb4d7a3308725afc02af9fd84a171e6e028 (patch) | |
| tree | 9302dd625d5d3c020a973ef059ea8780fdf95514 /drivers/gpu/drm | |
| parent | e4ca061275ec6a48b66c6edebe08644e666994c0 (diff) | |
| download | linux-cc017fb4d7a3308725afc02af9fd84a171e6e028.tar.bz2 | |
drm/i915/skl: Restrict the ring frequency table programming to SKL
Ring frequency table programming is not required on BXT. Added separate
checks to enable the programming only for SKL & skip for BXT.
v2: Removed the BXT check from gen6_update_ring_freq function
Issue: VIZ-5144
Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 135fb974dfff..f2be1cedb52f 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -6219,7 +6219,8 @@ static void intel_gen6_powersave_work(struct work_struct *work) } else if (INTEL_INFO(dev)->gen >= 9) { gen9_enable_rc6(dev); gen9_enable_rps(dev); - __gen6_update_ring_freq(dev); + if (IS_SKYLAKE(dev)) + __gen6_update_ring_freq(dev); } else if (IS_BROADWELL(dev)) { gen8_enable_rps(dev); __gen6_update_ring_freq(dev); |