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authorGuttula, Suresh <Suresh.Guttula@amd.com>2018-10-29 05:23:25 +0000
committerAlex Deucher <alexander.deucher@amd.com>2018-10-30 16:53:02 -0500
commit0cafc82fae41531b0162150f9a97f2c74f97118f (patch)
tree97cab9443cc2ff9ce8f00f1434e492fb77ca8a30 /drivers/gpu/drm
parentcb899a615be6c42e186e0e71862ebbd5a5c15533 (diff)
downloadlinux-0cafc82fae41531b0162150f9a97f2c74f97118f.tar.bz2
drm/amd/display: set backlight level limit to 1
This patch will work as workaround for silicon limitation related to PWM dutycycle when the backlight level goes to 0. Actually PWM value is 16 bit value and valid range from 1-65535. when ever user requested to set this PWM value to 0 which is not fall in the range, in VBIOS taken care this by limiting to 1. This patch here will do the same. Either driver or VBIOS can not pass 0 value as it is not a valid range for PWM and it will give a high PWM pulse which is not the intended behaviour as per HW constraints. Signed-off-by: suresh guttula <suresh.guttula@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index e224f23e2215..b0df6dc9a775 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1524,6 +1524,13 @@ static int amdgpu_dm_backlight_update_status(struct backlight_device *bd)
{
struct amdgpu_display_manager *dm = bl_get_data(bd);
+ /*
+ * PWM interperts 0 as 100% rather than 0% because of HW
+ * limitation for level 0.So limiting minimum brightness level
+ * to 1.
+ */
+ if (bd->props.brightness < 1)
+ return 1;
if (dc_link_set_backlight_level(dm->backlight_link,
bd->props.brightness, 0, 0))
return 0;