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author | Eric Anholt <eric@anholt.net> | 2016-02-15 17:06:02 -0800 |
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committer | Eric Anholt <eric@anholt.net> | 2016-02-26 15:51:29 -0800 |
commit | c31806fbdda910d337b60896040afa708bdfa2bd (patch) | |
tree | aff946c6e42987173384ecf539bc1ad64acc0dc4 /drivers/gpu/drm/vc4/vc4_regs.h | |
parent | 936f1a53f32148cc6164fad7c9a26ebf144e5ffb (diff) | |
download | linux-c31806fbdda910d337b60896040afa708bdfa2bd.tar.bz2 |
drm/vc4: Fix the name of the VSYNCD_EVEN register.
It's used for delaying vsync in interlaced mode.
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/vc4/vc4_regs.h')
-rw-r--r-- | drivers/gpu/drm/vc4/vc4_regs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h index 85c36d238669..d529665d43cd 100644 --- a/drivers/gpu/drm/vc4/vc4_regs.h +++ b/drivers/gpu/drm/vc4/vc4_regs.h @@ -187,7 +187,7 @@ # define PV_VCONTROL_CONTINUOUS BIT(1) # define PV_VCONTROL_VIDEN BIT(0) -#define PV_VSYNCD 0x08 +#define PV_VSYNCD_EVEN 0x08 #define PV_HORZA 0x0c # define PV_HORZA_HBP_MASK VC4_MASK(31, 16) |