diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2013-01-18 19:36:20 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2013-01-31 16:24:54 -0500 |
| commit | 014bb209214d8dce9698efea71c68d20ba477abc (patch) | |
| tree | 66640ef4a7ade13c0543abf37b37d06335eeb8dc /drivers/gpu/drm/radeon/sid.h | |
| parent | 168757ea854b7dd8eac3962753ed75a542ebca92 (diff) | |
| download | linux-014bb209214d8dce9698efea71c68d20ba477abc.tar.bz2 | |
drm/radeon: use status regs to determine what to reset (si)
When we attempt the reset the GPU, look at the status registers
to determine what blocks need to be reset.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/sid.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/sid.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index 76b5911585f1..07fc455e35ae 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h @@ -61,6 +61,14 @@ #define DMIF_ADDR_CONFIG 0xBD4 #define SRBM_STATUS 0xE50 +#define GRBM_RQ_PENDING (1 << 5) +#define VMC_BUSY (1 << 8) +#define MCB_BUSY (1 << 9) +#define MCB_NON_DISPLAY_BUSY (1 << 10) +#define MCC_BUSY (1 << 11) +#define MCD_BUSY (1 << 12) +#define SEM_BUSY (1 << 14) +#define IH_BUSY (1 << 17) #define SRBM_SOFT_RESET 0x0E60 #define SOFT_RESET_BIF (1 << 1) @@ -81,6 +89,10 @@ #define CC_SYS_RB_BACKEND_DISABLE 0xe80 #define GC_USER_SYS_RB_BACKEND_DISABLE 0xe84 +#define SRBM_STATUS2 0x0EC4 +#define DMA_BUSY (1 << 5) +#define DMA1_BUSY (1 << 6) + #define VM_L2_CNTL 0x1400 #define ENABLE_L2_CACHE (1 << 0) #define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1) |