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| author | Christian König <christian.koenig@amd.com> | 2015-05-12 14:56:17 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2015-05-12 09:12:42 -0400 |
| commit | 607d48063512707a414e346972e2210dc71ab491 (patch) | |
| tree | 0bed8de0ba35971d2a7ecd99767c94ceef271419 /drivers/gpu/drm/radeon/evergreen.c | |
| parent | 332545b3016cbff066c17037d32ec8aae8e4cfb5 (diff) | |
| download | linux-607d48063512707a414e346972e2210dc71ab491.tar.bz2 | |
drm/radeon: fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling
The mapping range is inclusive between starting and ending addresses.
Signed-off-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index f848acfd3fc8..05e6d6ef5963 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -2485,7 +2485,7 @@ static int evergreen_pcie_gart_enable(struct radeon_device *rdev) WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp); WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp); WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); - WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12); + WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1); WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | RANGE_PROTECTION_FAULT_ENABLE_DEFAULT); |