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authorBen Skeggs <bskeggs@redhat.com>2012-07-20 08:17:34 +1000
committerBen Skeggs <bskeggs@redhat.com>2012-10-03 13:12:56 +1000
commitebb945a94bba2ce8dff7b0942ff2b3f2a52a0a69 (patch)
tree07cad59be501458e6ae1304b7c0352e322ac3387 /drivers/gpu/drm/nouveau/nv10_fence.c
parentac1499d9573f4aadd1d2beac11fe23af8ce90c24 (diff)
downloadlinux-ebb945a94bba2ce8dff7b0942ff2b3f2a52a0a69.tar.bz2
drm/nouveau: port all engines to new engine module format
This is a HUGE commit, but it's not nearly as bad as it looks - any problems can be isolated to a particular chipset and engine combination. It was simply too difficult to port each one at a time, the compat layers are *already* ridiculous. Most of the changes here are simply to the glue, the process for each of the engine modules was to start with a standard skeleton and copy+paste the old code into the appropriate places, fixing up variable names etc as needed. v2: Marcin Slusarz <marcin.slusarz@gmail.com> - fix find/replace bug in license header v3: Ben Skeggs <bskeggs@redhat.com> - bump indirect pushbuf size to 8KiB, 4KiB barely enough for userspace and left no space for kernel's requirements during GEM pushbuf submission. - fix duplicate assignments noticed by clang v4: Marcin Slusarz <marcin.slusarz@gmail.com> - add sparse annotations to nv04_fifo_pause/nv04_fifo_start - use ioread32_native/iowrite32_native for fifo control registers v5: Ben Skeggs <bskeggs@redhat.com> - rebase on v3.6-rc4, modified to keep copy engine fix intact - nv10/fence: unmap fence bo before destroying - fixed fermi regression when using nvidia gr fuc - fixed typo in supported dma_mask checking Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv10_fence.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv10_fence.c63
1 files changed, 31 insertions, 32 deletions
diff --git a/drivers/gpu/drm/nouveau/nv10_fence.c b/drivers/gpu/drm/nouveau/nv10_fence.c
index dd7f17dd9903..ce752bf5cc4e 100644
--- a/drivers/gpu/drm/nouveau/nv10_fence.c
+++ b/drivers/gpu/drm/nouveau/nv10_fence.c
@@ -22,10 +22,11 @@
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
-#include "drmP.h"
-#include "nouveau_drv.h"
+#include <core/object.h>
+#include <core/class.h>
+
+#include "nouveau_drm.h"
#include "nouveau_dma.h"
-#include <core/ramht.h>
#include "nouveau_fence.h"
struct nv10_fence_chan {
@@ -64,12 +65,11 @@ int
nv17_fence_sync(struct nouveau_fence *fence,
struct nouveau_channel *prev, struct nouveau_channel *chan)
{
- struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
- struct nv10_fence_priv *priv = dev_priv->fence.func;
+ struct nv10_fence_priv *priv = chan->drm->fence;
u32 value;
int ret;
- if (!mutex_trylock(&prev->mutex))
+ if (!mutex_trylock(&prev->cli->mutex))
return -EBUSY;
spin_lock(&priv->lock);
@@ -96,14 +96,14 @@ nv17_fence_sync(struct nouveau_fence *fence,
FIRE_RING (chan);
}
- mutex_unlock(&prev->mutex);
+ mutex_unlock(&prev->cli->mutex);
return 0;
}
u32
nv10_fence_read(struct nouveau_channel *chan)
{
- return nvchan_rd32(chan, 0x0048);
+ return nv_ro32(chan->object, 0x0048);
}
void
@@ -118,10 +118,8 @@ nv10_fence_context_del(struct nouveau_channel *chan)
static int
nv10_fence_context_new(struct nouveau_channel *chan)
{
- struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
- struct nv10_fence_priv *priv = dev_priv->fence.func;
+ struct nv10_fence_priv *priv = chan->drm->fence;
struct nv10_fence_chan *fctx;
- struct nouveau_gpuobj *obj;
int ret = 0;
fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);
@@ -132,15 +130,19 @@ nv10_fence_context_new(struct nouveau_channel *chan)
if (priv->bo) {
struct ttm_mem_reg *mem = &priv->bo->bo.mem;
-
- ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_FROM_MEMORY,
- mem->start * PAGE_SIZE, mem->size,
- NV_MEM_ACCESS_RW,
- NV_MEM_TARGET_VRAM, &obj);
- if (!ret) {
- ret = nouveau_ramht_insert(chan, NvSema, obj);
- nouveau_gpuobj_ref(NULL, &obj);
- }
+ struct nouveau_object *object;
+ u32 start = mem->start * PAGE_SIZE;
+ u32 limit = mem->start + mem->size - 1;
+
+ ret = nouveau_object_new(nv_object(chan->cli), chan->handle,
+ NvSema, 0x0002,
+ &(struct nv_dma_class) {
+ .flags = NV_DMA_TARGET_VRAM |
+ NV_DMA_ACCESS_RDWR,
+ .start = start,
+ .limit = limit,
+ }, sizeof(struct nv_dma_class),
+ &object);
}
if (ret)
@@ -149,24 +151,22 @@ nv10_fence_context_new(struct nouveau_channel *chan)
}
void
-nv10_fence_destroy(struct drm_device *dev)
+nv10_fence_destroy(struct nouveau_drm *drm)
{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nv10_fence_priv *priv = dev_priv->fence.func;
-
+ struct nv10_fence_priv *priv = drm->fence;
+ nouveau_bo_unmap(priv->bo);
nouveau_bo_ref(NULL, &priv->bo);
- dev_priv->fence.func = NULL;
+ drm->fence = NULL;
kfree(priv);
}
int
-nv10_fence_create(struct drm_device *dev)
+nv10_fence_create(struct nouveau_drm *drm)
{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nv10_fence_priv *priv;
int ret = 0;
- priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+ priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
@@ -176,11 +176,10 @@ nv10_fence_create(struct drm_device *dev)
priv->base.emit = nv10_fence_emit;
priv->base.read = nv10_fence_read;
priv->base.sync = nv10_fence_sync;
- dev_priv->fence.func = &priv->base;
spin_lock_init(&priv->lock);
- if (dev_priv->chipset >= 0x17) {
- ret = nouveau_bo_new(dev, 4096, 0x1000, TTM_PL_FLAG_VRAM,
+ if (nv_device(drm->device)->chipset >= 0x17) {
+ ret = nouveau_bo_new(drm->dev, 4096, 0x1000, TTM_PL_FLAG_VRAM,
0, 0x0000, NULL, &priv->bo);
if (!ret) {
ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM);
@@ -197,6 +196,6 @@ nv10_fence_create(struct drm_device *dev)
}
if (ret)
- nv10_fence_destroy(dev);
+ nv10_fence_destroy(drm);
return ret;
}