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| author | Ben Skeggs <bskeggs@redhat.com> | 2018-05-08 20:39:47 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2018-05-18 15:01:28 +1000 |
| commit | 09e1b78aab5715eacab02e4047c7a47d72f6a1e9 (patch) | |
| tree | d889f7568557a7d0121c6138b223d5952bfb1e99 /drivers/gpu/drm/nouveau/dispnv50/core.c | |
| parent | 1590700d94ac53772491ed3103a4e8b8de01640a (diff) | |
| download | linux-09e1b78aab5715eacab02e4047c7a47d72f6a1e9.tar.bz2 | |
drm/nouveau/kms/nv50-: split core implementation by hardware class
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/dispnv50/core.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/dispnv50/core.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/gpu/drm/nouveau/dispnv50/core.c b/drivers/gpu/drm/nouveau/dispnv50/core.c index b12899fe052a..f87cbaa4f8ec 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/core.c +++ b/drivers/gpu/drm/nouveau/dispnv50/core.c @@ -42,17 +42,17 @@ nv50_core_new(struct nouveau_drm *drm, struct nv50_core **pcore) int version; int (*new)(struct nouveau_drm *, s32, struct nv50_core **); } cores[] = { - { GP102_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, - { GP100_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, - { GM200_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, - { GM107_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, - { GK110_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, - { GK104_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, - { GF110_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, - { GT214_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, - { GT206_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, - { GT200_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, - { G82_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, + { GP102_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, + { GP100_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, + { GM200_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, + { GM107_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, + { GK110_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, + { GK104_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, + { GF110_DISP_CORE_CHANNEL_DMA, 0, core907d_new }, + { GT214_DISP_CORE_CHANNEL_DMA, 0, core827d_new }, + { GT206_DISP_CORE_CHANNEL_DMA, 0, core827d_new }, + { GT200_DISP_CORE_CHANNEL_DMA, 0, core827d_new }, + { G82_DISP_CORE_CHANNEL_DMA, 0, core827d_new }, { NV50_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, {} }; |