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authorjason-jh.lin <jason-jh.lin@mediatek.com>2021-11-30 02:44:34 +0800
committerChun-Kuang Hu <chunkuang.hu@kernel.org>2021-12-02 07:32:41 +0800
commit007f26ee4f6406fd52f96efa2289666781310ea9 (patch)
treedb20f5f7a4e5c8e00646eecae6d9840eb0f7e2f0 /drivers/gpu/drm/mediatek
parent7f82d9c438797459c397d59209616469d9f5842c (diff)
downloadlinux-007f26ee4f6406fd52f96efa2289666781310ea9.tar.bz2
drm/mediatek: Remove unused define in mtk_drm_ddp_comp.c
Remove the unsed define in mtk_drm_ddp_comp.c Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Diffstat (limited to 'drivers/gpu/drm/mediatek')
-rw-r--r--drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 3704e4b7f3c5..7d3bd6214c15 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -21,8 +21,6 @@
#include "mtk_drm_crtc.h"
#define DISP_OD_EN 0x0000
-#define DISP_OD_INTEN 0x0008
-#define DISP_OD_INTSTA 0x000c
#define DISP_OD_CFG 0x0020
#define DISP_OD_SIZE 0x0030
#define DISP_DITHER_5 0x0114
@@ -39,26 +37,18 @@
#define DITHER_ENGINE_EN BIT(1)
#define DISP_DITHER_SIZE 0x0030
-#define LUT_10BIT_MASK 0x03ff
-
#define OD_RELAYMODE BIT(0)
#define UFO_BYPASS BIT(2)
#define DISP_DITHERING BIT(2)
#define DITHER_LSB_ERR_SHIFT_R(x) (((x) & 0x7) << 28)
-#define DITHER_OVFLW_BIT_R(x) (((x) & 0x7) << 24)
#define DITHER_ADD_LSHIFT_R(x) (((x) & 0x7) << 20)
-#define DITHER_ADD_RSHIFT_R(x) (((x) & 0x7) << 16)
#define DITHER_NEW_BIT_MODE BIT(0)
#define DITHER_LSB_ERR_SHIFT_B(x) (((x) & 0x7) << 28)
-#define DITHER_OVFLW_BIT_B(x) (((x) & 0x7) << 24)
#define DITHER_ADD_LSHIFT_B(x) (((x) & 0x7) << 20)
-#define DITHER_ADD_RSHIFT_B(x) (((x) & 0x7) << 16)
#define DITHER_LSB_ERR_SHIFT_G(x) (((x) & 0x7) << 12)
-#define DITHER_OVFLW_BIT_G(x) (((x) & 0x7) << 8)
#define DITHER_ADD_LSHIFT_G(x) (((x) & 0x7) << 4)
-#define DITHER_ADD_RSHIFT_G(x) (((x) & 0x7) << 0)
#define DISP_POSTMASK_EN 0x0000
#define POSTMASK_EN BIT(0)