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authorLinus Walleij <linus.walleij@linaro.org>2020-08-09 00:31:20 +0200
committerLinus Walleij <linus.walleij@linaro.org>2020-08-13 16:39:15 +0200
commitf6fd1d70609ca691ee5dc0d2748b6eeaa57a9535 (patch)
tree87eb1343094091132bf4378cb79f466e80967e8d /drivers/gpu/drm/mcde/mcde_dsi.c
parent44c3867a56e3cdda4b7ea4e4983c4fdafd45b3c9 (diff)
downloadlinux-f6fd1d70609ca691ee5dc0d2748b6eeaa57a9535.tar.bz2
drm/mcde: Support using DSI in LP mode
It is possible to set a flag in the struct mipi_dsi_device so the panel is handled in low power (LP) mode. Some displays only support this mode and it is also good for testing. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: newbytee@protonmail.com Cc: Stephan Gerhold <stephan@gerhold.net> Link: https://patchwork.freedesktop.org/patch/msgid/20200808223122.1492124-2-linus.walleij@linaro.org
Diffstat (limited to 'drivers/gpu/drm/mcde/mcde_dsi.c')
-rw-r--r--drivers/gpu/drm/mcde/mcde_dsi.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/drm/mcde/mcde_dsi.c b/drivers/gpu/drm/mcde/mcde_dsi.c
index a342e898298b..5cea8cbf084c 100644
--- a/drivers/gpu/drm/mcde/mcde_dsi.c
+++ b/drivers/gpu/drm/mcde/mcde_dsi.c
@@ -812,10 +812,11 @@ static void mcde_dsi_start(struct mcde_dsi *d)
/* Command mode, clear IF1 ID */
val = readl(d->regs + DSI_CMD_MODE_CTL);
/*
- * If we enable low-power mode here, with
- * val |= DSI_CMD_MODE_CTL_IF1_LP_EN
+ * If we enable low-power mode here,
* then display updates become really slow.
*/
+ if (d->mdsi->mode_flags & MIPI_DSI_MODE_LPM)
+ val |= DSI_CMD_MODE_CTL_IF1_LP_EN;
val &= ~DSI_CMD_MODE_CTL_IF1_ID_MASK;
writel(val, d->regs + DSI_CMD_MODE_CTL);
@@ -904,10 +905,11 @@ static void mcde_dsi_bridge_pre_enable(struct drm_bridge *bridge)
/* Command mode, clear IF1 ID */
val = readl(d->regs + DSI_CMD_MODE_CTL);
/*
- * If we enable low-power mode here with
- * val |= DSI_CMD_MODE_CTL_IF1_LP_EN
+ * If we enable low-power mode here
* the display updates become really slow.
*/
+ if (d->mdsi->mode_flags & MIPI_DSI_MODE_LPM)
+ val |= DSI_CMD_MODE_CTL_IF1_LP_EN;
val &= ~DSI_CMD_MODE_CTL_IF1_ID_MASK;
writel(val, d->regs + DSI_CMD_MODE_CTL);
}